公开(公告)号：US20080213987A1

公开(公告)日：2008-09-04

申请号：US10587661

申请日：2004-10-24

Applicant: Peter Deixler ,  Brian Wroblewski ,  Roy Colclaser

Inventor： Peter Deixler ,  Brian Wroblewski ,  Roy Colclaser

IPC: H01L21/20

CPC classification number: H01L29/66242 ,  H01L21/8249 ,  H01L29/7378

Abstract: A method of fabricating an integrated circuit includes providing a substrate and creating base-windows in a layer. The method also includes forming a monocrystalline SiGe base layer in each of the base layers, and polycrystalline SiGe elsewhere. Additionally, the method also includes forming a monocrystalline silicon layer over selectively exposed portions of the surface of the substrate. The integrated circuit beneficially includes silicon-based elements such as a lateral pnp transistor, a varactor, and a polysilicon transistor, which are formed on a common substrate with an npn SiGe bipolar transistor.

Abstract translation: 一种制造集成电路的方法包括提供衬底并在层中形成基底窗口。 该方法还包括在每个基层中形成单晶SiGe基层，在其它地方形成多晶SiGe。 另外，该方法还包括在衬底的表面的选择性暴露部分上形成单晶硅层。 集成电路有利地包括硅基元件，例如横向pnp晶体管，变容二极管和多晶硅晶体管，其形成在具有npn SiGe双极晶体管的公共衬底上。