公开(公告)号：US20100250222A1

公开(公告)日：2010-09-30

申请号：US12795016

申请日：2010-06-07

申请人： Peter SZPAK ,  Matthew ENGLEHART

发明人： Peter SZPAK ,  Matthew ENGLEHART

IPC分类号： G06F17/50

CPC分类号： G06F17/5009 ,  G06F2217/74

摘要： A computer-implemented method may include defining an input bus signal in a graphical block diagram model by associating the input bus signal with a first group of signals, at least two of the first group of signals having a different data type; defining an output bus signal in the graphical block diagram model by associating the second bus signal with a second group of signals, each of the second group of signals corresponding to one of the first group of signals; defining an input to a non-virtual operation block in the graphical block diagram model as the input bus signal; defining an output to the non-virtual operation block in the graphical block diagram as the output bus signal; and simulating an operation performed on the input bus signal by the non-virtual operation block, the operation being performed on each of the first group of signals and output to each of the second group of signals.

公开(公告)号：US20090248385A1

公开(公告)日：2009-10-01

申请号：US12467810

申请日：2009-05-18

申请人： Peter SZPAK ,  Matthew ENGLEHART

发明人： Peter SZPAK ,  Matthew ENGLEHART

IPC分类号： G06F17/50 ,  G06F3/048

CPC分类号： G06F17/5009 ,  G06F2217/74

摘要： In a graphical modeling environment, bus signals, which group a plurality of signals together for simplifying a model, include a partial or complete physical definition. Models are simplified by passing bus signals through graphical objects representing functional entities, without degrouping the bus signal. During simulation of the model, code can be generated for the bus signal having a complete definition independent of other components of the graphical model.

摘要翻译： 在图形建模环境中，将多个信号组合在一起以简化模型的总线信号包括部分或完整的物理定义。 通过将总线信号通过表示功能实体的图形对象来简化模型，而不会对总线信号进行分组。 在仿真模型期间，可以为具有独立于图形模型的其他部件的完整定义的总线信号生成代码。

公开(公告)号：US20100333062A1

公开(公告)日：2010-12-30

申请号：US12873098

申请日：2010-08-31

申请人： Peter SZPAK

发明人： Peter SZPAK

IPC分类号： G06F9/44

CPC分类号： G06F8/34

摘要： Graphical programming or modeling environments in which a coding standard can be applied to graphical programs or models are disclosed. The present invention provides mechanisms for applying the coding standard to graphical programs/models in the graphical programming/modeling environments. The mechanisms may detect violations of the coding standard in the graphical model and report such violations to the users. The mechanisms may automatically correct the graphical model to remove the violations from the graphical model. The mechanisms may also automatically avoid the violations in the simulation and/or code generation of the graphical model.

摘要翻译： 公开了可以将编码标准应用于图形程序或模型的图形编程或建模环境。 本发明提供了将编码标准应用于图形编程/建模环境中的图形程序/模型的机制。 这些机制可以检测图形模型中的编码标准的违规，并向用户报告这种违规。 这些机制可能会自动更正图形模型，以从图形模型中删除违规。 这些机制还可以自动避免图形模型的模拟和/或代码生成中的违规。

公开(公告)号：US20100211374A1

公开(公告)日：2010-08-19

申请号：US12771397

申请日：2010-04-30

申请人： Peter SZPAK ,  Matthew ENGLEHART

发明人： Peter SZPAK ,  Matthew ENGLEHART

IPC分类号： G06F9/455

CPC分类号： G06F17/5009 ,  G06F2217/74

摘要： A computer-implemented method may include defining an input bus signal in a graphical block diagram model by associating the input bus signal with a first group of signals, at least two of the first group of signals having a different data type; defining an output bus signal in the graphical block diagram model by associating the second bus signal with a second group of signals, each of the second group of signals corresponding to one of the first group of signals; defining an input to a non-virtual operation block in the graphical block diagram model as the input bus signal; defining an output to the non-virtual operation block in the graphical block diagram as the output bus signal; and simulating an operation performed on the input bus signal by the non-virtual operation block, the operation being performed on each of the first group of signals and output to each of the second group of signals.

摘要翻译： 计算机实现的方法可以包括通过将输入总线信号与第一组信号相关联来定义图形框图模型中的输入总线信号，第一组信号中的至少两个具有不同的数据类型; 通过将所述第二总线信号与第二组信号相关联来在所述图形框图模型中定义输出总线信号，所述第二组信号中的每一个对应于所述第一组信号之一; 将图形框图模型中的非虚拟操作块的输入定义为输入总线信号; 将图形框图中的非虚拟操作块的输出定义为输出总线信号; 以及模拟通过所述非虚拟操作块对所述输入总线信号执行的操作，对所述第一组信号中的每一个执行所述操作并输出到所述第二组信号中的每一个。

公开(公告)号：US20120331444A1

公开(公告)日：2012-12-27

申请号：US13603027

申请日：2012-09-04

申请人： Peter SZPAK ,  Paulo PACHECO ,  Christian ROBL ,  Martin OREHEK

发明人： Peter SZPAK ,  Paulo PACHECO ,  Christian ROBL ,  Martin OREHEK

IPC分类号： G06F9/44

CPC分类号： G06Q10/10 ,  G06F8/10 ,  G06F8/34 ,  G06F9/451 ,  G06Q10/06

摘要： A system may identify a workflow associated with a graphical model and execute the workflow in a number of stages. The system may display a number of components of the graphical model and identify which of the displayed components are associated with or affected by execution of a current one of the stages of the workflow.

摘要翻译： 系统可以识别与图形模型相关联的工作流并且在多个阶段中执行工作流程。 系统可以显示图形模型的多个组件，并且识别哪个显示的组件与执行工作流的当前阶段相关联或受其影响。

公开(公告)号：US20120254827A1

公开(公告)日：2012-10-04

申请号：US13250590

申请日：2011-09-30

申请人： Mirko CONRAD ,  Xiaocang LIN ,  Jun YAN ,  Peter SZPAK ,  Appa Rao NIRAKH ,  Jaya SHANKAR

发明人： Mirko CONRAD ,  Xiaocang LIN ,  Jun YAN ,  Peter SZPAK ,  Appa Rao NIRAKH ,  Jaya SHANKAR

IPC分类号： G06F9/44

CPC分类号： G06F8/35 ,  G06F11/3604

摘要： In an embodiment, a model is sliced into a plurality of slices. A slice in the plurality of slices is selected. A portion of code, that corresponds to the selected slice, is identified from code generated from the model. The identified code is verified to be equivalent to the selected slice. Equivalence may include equivalent functionality, equivalent data types, equivalent performance, and/or other forms of equivalence between the selected slice and the identified generated code.

摘要翻译： 在一个实施例中，将模型切成多个切片。 选择多个片中的切片。 根据从模型生成的代码来识别对应于所选切片的一部分代码。 所识别的代码被验证为等同于所选择的切片。 等效性可以包括等效的功能，等效的数据类型，等效的性能，和/或所选切片和所识别的生成的代码之间的等价的其他形式。

公开(公告)号：US20120254830A1

公开(公告)日：2012-10-04

申请号：US13250577

申请日：2011-09-30

申请人： Mirko CONRAD ,  Xiaocang LIN ,  Jun YAN ,  Peter SZPAK ,  Matthew Wnglehart ,  Appa Rao NIRAKH ,  Jaya SHANKAR

发明人： Mirko CONRAD ,  Xiaocang LIN ,  Jun YAN ,  Peter SZPAK ,  Matthew Wnglehart ,  Appa Rao NIRAKH ,  Jaya SHANKAR

IPC分类号： G06F9/44

CPC分类号： G06F11/3604 ,  G06F8/35

摘要： In an embodiment, a model is sliced into a plurality of slices. A slice in the plurality of slices is selected. A portion of code, that corresponds to the selected slice, is identified from code generated from the model. The identified code is verified to be equivalent to the selected slice. Equivalence may include equivalent functionality, equivalent data types, equivalent performance, and/or other forms of equivalence between the selected slice and the identified generated code.

公开(公告)号：US20100211369A1

公开(公告)日：2010-08-19

申请号：US12771359

申请日：2010-04-30

申请人： Peter SZPAK ,  Matthew ENGLEHART

发明人： Peter SZPAK ,  Matthew ENGLEHART

IPC分类号： G06G7/48

CPC分类号： G06F17/5009 ,  G06F2217/74

摘要： A computer-implemented method may include defining an input bus signal in a graphical block diagram model by associating the input bus signal with a first group of signals, at least two of the first group of signals having a different data type; defining an output bus signal in the graphical block diagram model by associating the second bus signal with a second group of signals, each of the second group of signals corresponding to one of the first group of signals; defining an input to a non-virtual operation block in the graphical block diagram model as the input bus signal; defining an output to the non-virtual operation block in the graphical block diagram as the output bus signal; and simulating an operation performed on the input bus signal by the non-virtual operation block, the operation being performed on each of the first group of signals and output to each of the second group of signals.