-
1.
公开(公告)号:US5019878A
公开(公告)日:1991-05-28
申请号:US332652
申请日:1989-03-31
申请人: Ping Yang , Amitava Chatterjee , Shian Aur , Thomas L. Polgreen
发明人: Ping Yang , Amitava Chatterjee , Shian Aur , Thomas L. Polgreen
IPC分类号: H01L21/8246 , H01L27/112 , H01L29/10 , H01L29/78
CPC分类号: H01L29/78 , H01L29/1033 , Y10S257/914
摘要: A programmable device (10) is formed from a silicided MOS transistor. The transistor 10) is formed at a face of a semiconductor layer (12), and includes a diffused drain region (17, 22) and a source region (19, 24) that are spaced apart by a channel region (26). At least the drain region (22) has a surface with a silicided layer (28) formed on a portion thereof. The application of a programming voltage in the range of ten to fifteen volts from the drain region (17, 22) to the source region (19, 24) has been discovered to reliably form a melt filament (40) across the channel region (26). A gate voltage (V.sub.g) may be applied to the insulated gate (14) over the channel region (26) such that a ten-volt programming voltage (V.sub.PROG) will cause melt filaments to form in those transistors to which the gate voltage is applied, but will not cause melt filaments to form in the remaining transistors (10) of an array.
摘要翻译: 可编程器件(10)由硅化MOS晶体管形成。 晶体管10)形成在半导体层(12)的表面,并且包括被沟道区域(26)隔开的扩散漏极区域(17,22)和源极区域(19,24)。 至少漏极区域(22)具有在其一部分上形成有硅化物层(28)的表面。 已经发现,从漏区(17,22)到源区(19,24)的施加从十到十五伏的范围内的编程电压可靠地在通道区域(26)上形成熔丝(40) )。 栅极电压(Vg)可以在沟道区域(26)上施加到绝缘栅极(14),使得十伏编程电压(VPROG)将在施加栅极电压的晶体管中形成熔丝 ,但不会在阵列的剩余晶体管(10)中形成熔丝。
-
2.
公开(公告)号:US5068696A
公开(公告)日:1991-11-26
申请号:US574981
申请日:1990-08-29
申请人: Ping Yang , Amitava Chatterjee , Shian Aur , Thomas L. Polgreen
发明人: Ping Yang , Amitava Chatterjee , Shian Aur , Thomas L. Polgreen
CPC分类号: H01L29/78 , H01L29/1033
摘要: A programmable device (10) is formed from a silicided MOS transistor. The transistor (10) is formed at a face of a semiconductor layer (12), and includes a diffused drain region (17, 22) and a source region (19, 24) that are spaced apart by a channel region (26). At least the drain region (22) has a surface with a silicided layer (28) formed on a portion thereof. The application of a programming voltage in the range of ten to fifteen volts from the drain region (17, 22) to the source region (19, 24) has been discovered to reliably form a melt filament (40) across the channel region (26). A gate voltage (V.sub.g) may be applied to the insulated gate (14) over the channel region (26) such that a ten-volt programming voltage (V.sub.PROG) will cause melt filaments to form in those transistors to which the gate voltage is applied, but will not cause melt filaments to form in the remaining transistors (10) of an array.
摘要翻译: 可编程器件(10)由硅化MOS晶体管形成。 晶体管(10)形成在半导体层(12)的表面,并且包括由沟道区域(26)间隔开的扩散漏极区域(17,22)和源极区域(19,24)。 至少漏极区域(22)具有在其一部分上形成有硅化物层(28)的表面。 已经发现,从漏区(17,22)到源区(19,24)的施加从十到十五伏的范围内的编程电压可靠地在通道区域(26)上形成熔丝(40) )。 栅极电压(Vg)可以在沟道区域(26)上施加到绝缘栅极(14),使得十伏编程电压(VPROG)将在施加栅极电压的晶体管中形成熔丝 ,但不会在阵列的剩余晶体管(10)中形成熔丝。
-