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公开(公告)号：US06651228B1
公开(公告)日：2003-11-18
申请号：US09566684
申请日：2000-05-08
IPC分类号： G06F1750
CPC分类号： G06F17/5022
摘要： A method and apparatus are provided that facilitate analysis of the intended flow of logical signals between key points in a design. According to one aspect of the present invention, hardware design defects can be detected using a novel Intent-Driven Verification process. First, a representation of a hardware design and information regarding the intended flow of logical signals among variables in the representation are received. Then, the existence of potential errors in the hardware design may be inferred based upon the information regarding the intended flow of logical signals by (1) translating the information regarding the intended flow of logical signals into a comprehensive set of checks that must hold true in order for the hardware design to operate in accordance with the intended flow of logical signals, and (2) determining if any of the checks can be violated during operation of circuitry represented by the hardware design.
摘要翻译： 提供了一种便于在设计中的关键点之间分析逻辑信号的预期流程的方法和装置。 根据本发明的一个方面，可以使用新颖的意图驱动验证过程来检测硬件设计缺陷。 首先，接收硬件设计的表示和关于表示中的变量之间的逻辑信号的预期流程的信息。 然后，可以基于关于逻辑信号的预期流程的信息来推断硬件设计中的潜在错误的存在，即（1）将关于逻辑信号的预期流程的信息转换成必须在 硬件设计的顺序是根据逻辑信号的预期流程进行操作，以及（2）在由硬件设计表示的电路的操作期间确定是否可以违反任何检查。
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公开(公告)号：US06571375B1
公开(公告)日：2003-05-27
申请号：US09566682
申请日：2000-05-08
IPC分类号： G06F1750
CPC分类号： G06F17/5022
摘要： A method and apparatus are provided that facilitate analysis of the intended flow of logical signals between key points in a design. According to one aspect of the present invention, multiple design verification checks associated with a hardware design are linked by determining dependency reationships among the multiple design verification checks. Each of the design verification checks represent a condition that must hold true in order for the hardware design to operate in accordance with an intended flow of logical signals in the hardware design.
摘要翻译： 提供了一种便于在设计中的关键点之间分析逻辑信号的预期流程的方法和装置。 根据本发明的一个方面，通过确定多个设计验证检查之间的依赖关系，链接与硬件设计相关联的多个设计验证检查。 每个设计验证检查都代表了硬件设计根据硬件设计中逻辑信号的预期流程进行操作的必要条件。
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3.发明授权公开(公告)号：US06704912B2
公开(公告)日：2004-03-09
申请号：US09770068
申请日：2001-01-24
IPC分类号： G06F1750
CPC分类号： G06F17/5022
摘要： A method and apparatus for characterizing information about design attributes is described. The characterization process may begin with determining the dependency among the attributes within a hardware design. Once the dependency is determined, the most relevant information about the hardware design attribute may be highlighted. A user can then focus their attention on the highlighted aspects of the design attribute to draw conclusions about the hardware design as a whole.
摘要翻译： 描述用于表征关于设计属性的信息的方法和装置。 表征过程可以从确定硬件设计中的属性之间的依赖性开始。 一旦确定依赖关系，可以突出显示关于硬件设计属性的最相关信息。 然后，用户可以将注意力集中在设计属性的突出显示的方面，以得出关于整体硬件设计的结论。
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