公开(公告)号：US20030143849A1

公开(公告)日：2003-07-31

申请号：US10393975

申请日：2003-03-24

申请人： ProMos Technologies Inc.

发明人： Ming-Cheng Yang ,  Jiun-Fang Wang

IPC分类号： H01L021/302 ,  H01L021/461

CPC分类号： H01L21/3212 ,  H01L21/76829 ,  H01L21/7684

摘要： A method for avoiding defects produced in The CMP process has the following steps: sequentially depositing a first dielectric layer and a second dielectric layer on a semiconductor substrate, wherein the wet-etching rate of the first dielectric layer is greater than the wet-etching rate of the second dielectric layer; forming a plurality of first holes on a plurality of the predetermined contact window areas respectively; wet etching the first dielectric layer in each of the first holes to form a plurality of second holes on the plurality of the predetermined contact window areas respectively; forming a conductive layer to fill each of the second holes; and performing the CMP process to level off the conductive layer and the second dielectric layer.