公开(公告)号：US20050096060A1

公开(公告)日：2005-05-05

申请号：US10701537

申请日：2003-11-05

申请人： Purva Rajkotia ,  Paul Gilliland

发明人： Purva Rajkotia ,  Paul Gilliland

IPC分类号： H04W24/00 ,  H04Q7/20

CPC分类号： H04W24/00

摘要： For use in a wireless network, a base station that controls use of the reduced slot cycle mode by mobile stations communicating with the base station. The base station comprises: i) a traffic monitor for monitoring message traffic levels handled by the base station; and ii) a reduced slot cycle controller for receiving traffic statistics information from the traffic monitor and determining whether use of the reduced slot cycle mode by the mobile stations communicating with the base station interferes with scheduling of paging message transmissions by the base station. The reduced slot cycle controller, in response to a determination that use of the reduced slot cycle mode by the mobile stations does interfere with the scheduling of paging message transmissions by the base station, causes the base station to transmit a first control message indicating that the reduced slot cycle mode is disabled in the base station.

摘要翻译： 为了在无线网络中使用，基站通过与基站通信的移动台来控制减少的时隙周期模式的使用。 基站包括：i）用于监视由基站处理的消息业务量的业务监视器; 以及ii）减少的时隙周期控制器，用于从业务监视器接收业务统计信息，并确定由与基站通信的移动站的减少的时隙周期模式的使用是否干扰基站的寻呼消息传输的调度。 减少的时隙周期控制器响应于确定移动站使用减少的时隙周期模式确实干扰基站对寻呼消息传输的调度，导致基站发送第一控制消息，指示第 在基站中禁用缩短的时隙周期模式。

公开(公告)号：US08364185B2

公开(公告)日：2013-01-29

申请号：US11261215

申请日：2005-10-28

申请人： Nivedan Thadasina ,  John Csapo ,  Paul Gilliland

发明人： Nivedan Thadasina ,  John Csapo ,  Paul Gilliland

IPC分类号： H04B7/00

CPC分类号： H04B7/2687 ,  H04W56/002

摘要： A method of synchronizing a clock for an adjacent network (AN) to a clock for an overlay network (ON) is provided. The method includes extracting an ON clock signal from an outgoing signal transmitted from the overlay network. The AN clock is synchronized to the ON clock based on the extracted ON clock signal.

摘要翻译： 提供了将相邻网络（AN）的时钟同步到覆盖网络（ON）的时钟的方法。 该方法包括从覆盖网络发送的输出信号中提取ON时钟信号。 AN时钟基于提取的ON时钟信号与ON时钟同步。

公开(公告)号：US20060234739A1

公开(公告)日：2006-10-19

申请号：US11261215

申请日：2005-10-28

申请人： Nivedan Thadasina ,  John Csapo ,  Paul Gilliland

发明人： Nivedan Thadasina ,  John Csapo ,  Paul Gilliland

IPC分类号： H04B7/00 ,  H04B15/00

CPC分类号： H04B7/2687 ,  H04W56/002

摘要： A method of synchronizing a clock for an adjacent network (AN) to a clock for an overlay network (ON) is provided. The method includes extracting an ON clock signal from an outgoing signal transmitted from the overlay network. The AN clock is synchronized to the ON clock based on the extracted ON clock signal.