公开(公告)号：US20140237275A1

公开(公告)日：2014-08-21

申请号：US13771075

申请日：2013-02-19

Applicant: QUALCOMM INCORPORATED

Inventor： Joseph Victor Zanotelli ,  Martin Saint-Laurent

IPC: G06F1/32

CPC classification number: G06F1/3243 ,  Y02D10/152

Abstract: A processor having a multi-Vt critical path is provided that includes both low-Vt devices and high-Vt devices. If the processor is operating in a high performance mode, the multi-Vt critical path is controlled so as to use the low-Vt devices. Conversely, if the processor is operating in a low power mode, the multi-Vt critical path is controlled so as to use the high-Vt devices. In this fashion, the complication of multiple processing cores is avoided in that a single processor core can operate in both the high performance mode and in the low power mode.

Abstract translation: 提供具有多Vt关键路径的处理器，其包括低Vt设备和高Vt设备。 如果处理器在高性能模式下运行，则会控制多Vt关键路径，以便使用低Vt设备。 相反，如果处理器在低功耗模式下工作，则控制多Vt关键路径以便使用高Vt器件。 以这种方式，避免了单个处理器核心可以在高性能模式和低功率模式下工作的多处理核心的复杂性。

公开(公告)号：US09348402B2

公开(公告)日：2016-05-24

申请号：US13771075

申请日：2013-02-19

Applicant: QUALCOMM Incorporated

Inventor： Joseph Victor Zanotelli ,  Martin Saint-Laurent

IPC: G11C16/04 ,  G06F1/32

CPC classification number: G06F1/3243 ,  Y02D10/152

Abstract: A processor having a multi-Vt critical path is provided that includes both low-Vt devices and high-Vt devices. If the processor is operating in a high performance mode, the multi-Vt critical path is controlled so as to use the low-Vt devices. Conversely, if the processor is operating in a low power mode, the multi-Vt critical path is controlled so as to use the high-Vt devices. In this fashion, the complication of multiple processing cores is avoided in that a single processor core can operate in both the high performance mode and in the low power mode.

Abstract translation: 提供具有多Vt关键路径的处理器，其包括低Vt设备和高Vt设备。 如果处理器在高性能模式下运行，则会控制多Vt关键路径，以便使用低Vt设备。 相反，如果处理器在低功耗模式下工作，则控制多Vt关键路径以便使用高Vt器件。 以这种方式，避免了单个处理器核心可以在高性能模式和低功率模式下工作的多处理核心的复杂性。