公开(公告)号：US11494120B2

公开(公告)日：2022-11-08

申请号：US17061889

申请日：2020-10-02

Applicant: QUALCOMM INCORPORATED

Inventor： Vikrant Kumar ,  Karthik Chandrasekar

IPC: G06F3/06

Abstract: Memory transactions in a computing device may be scheduled by forming subsets of a set of memory transactions corresponding to memory transaction requests directed to a DRAM. Each subset may include transactions identified by the same combination of direction (read or write) and DRAM rank as each other. The transactions selected for inclusion in each subset may be determined based on efficiency. One of the subsets may be selected based on a metric applied to each subset, and the transactions in the selected subset may be sent to the DRAM.