Methods and devices for matching transmission line characteristics using stacked metal oxide semiconductor (MOS) transistors
    1.
    发明授权
    Methods and devices for matching transmission line characteristics using stacked metal oxide semiconductor (MOS) transistors 有权
    使用叠层金属氧化物半导体(MOS)晶体管匹配传输线特性的方法和装置

    公开(公告)号:US08928365B2

    公开(公告)日:2015-01-06

    申请号:US13658778

    申请日:2012-10-23

    CPC classification number: H03K19/017554 H03K19/0005

    Abstract: An output driver for electrostatic discharge (ESD) protection includes a first pair of stacked metal oxide semiconductor field-effect transistor (MOS) devices coupled between a power terminal and a first differential output terminal. The output driver also includes a second pair of stacked MOS devices coupled between a second differential output terminal and a ground terminal.

    Abstract translation: 用于静电放电(ESD)保护的输出驱动器包括耦合在电源端子和第一差分输出端子之间的第一对堆叠金属氧化物半导体场效应晶体管(MOS)器件。 输出驱动器还包括耦合在第二差分输出端子和接地端子之间的第二对堆叠MOS器件。

    METHODS AND DEVICES FOR MATCHING TRANSMISSION LINE CHARACTERISTICS USING STACKED METAL OXIDE SEMICONDUCTOR (MOS) TRANSISTORS
    2.
    发明申请
    METHODS AND DEVICES FOR MATCHING TRANSMISSION LINE CHARACTERISTICS USING STACKED METAL OXIDE SEMICONDUCTOR (MOS) TRANSISTORS 有权
    使用堆叠金属氧化物半导体(MOS)晶体管匹配传输线特性的方法和装置

    公开(公告)号:US20140111250A1

    公开(公告)日:2014-04-24

    申请号:US13658778

    申请日:2012-10-23

    CPC classification number: H03K19/017554 H03K19/0005

    Abstract: An output driver for electrostatic discharge (ESD) protection includes a first pair of stacked metal oxide semiconductor field-effect transistor (MOS) devices coupled between a power terminal and a first differential output terminal. The output driver also includes a second pair of stacked MOS devices coupled between a second differential output terminal and a ground terminal.

    Abstract translation: 用于静电放电(ESD)保护的输出驱动器包括耦合在电源端子和第一差分输出端子之间的第一对堆叠金属氧化物半导体场效应晶体管(MOS)器件。 输出驱动器还包括耦合在第二差分输出端子和接地端子之间的第二对堆叠MOS器件。

    System and method for de-modulating a high-supply-domain differential signal and a common-mode clock in a front-end receiver
    3.
    发明授权
    System and method for de-modulating a high-supply-domain differential signal and a common-mode clock in a front-end receiver 有权
    在前端接收机中对高电源域差分信号和共模时钟进行解调的系统和方法

    公开(公告)号:US08767841B1

    公开(公告)日:2014-07-01

    申请号:US13783751

    申请日:2013-03-04

    CPC classification number: H04L25/0292 H04L25/0276

    Abstract: Techniques for de-modulating a high-supply-domain differential signal and a common-mode clock in a front-end receiver are described herein. In one embodiment, a method for receiving a signal comprises receiving the signal via a receiver input, the received signal comprising a differential signal and a common-mode clock signal. The method also comprises shifting the received signal from a first voltage range to a second voltage range that is lower than the first voltage range, and providing the shifted received signal on a first level-shifted signal line and a second level-shifted signal line. The method further comprises sensing voltage differences between the first and second level-shifted lines to recover the differential signal, and sensing common-mode voltages on the first and second level-shifted signal lines to recover the common-mode clock signal.

    Abstract translation: 本文描述了用于对前端接收机中的高供应域差分信号和共模时钟进行解调的技术。 在一个实施例中,用于接收信号的方法包括经由接收器输入接收信号,所述接收信号包括差分信号和共模时钟信号。 该方法还包括将接收到的信号从第一电压范围移动到低于第一电压范围的第二电压范围,以及在第一电平移位信号线和第二电平移位信号线上提供移位的接收信号。 该方法还包括感测第一和第二电平移位线之间的电压差以恢复差分信号,以及感测第一和第二电平移位信号线上的共模电压以恢复共模时钟信号。

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