公开(公告)号：US20150357013A1

公开(公告)日：2015-12-10

申请号：US14298819

申请日：2014-06-06

Applicant: QUALCOMM Incorporated

Inventor： Alex Dongkyu PARK ,  Venkatasubramanian NARAYANAN ,  Ritu CHABA ,  Derek Xiaoxiang YANG ,  Arun Babu PALLERLA

IPC: G11C7/12 ,  G11C11/417

CPC classification number: G11C7/12 ,  G11C7/227 ,  G11C11/417 ,  G11C11/419

Abstract: A memory and a method for operating the memory are provided. The memory includes a bitline and at least one memory cell coupled to the bitline. A bitline precharge circuit is configured to precharge the bitline for a memory access and to deactivate to float the bitline in a standby state. A reference circuit is configured to charge a load circuit to a voltage in the standby state. In one example, the load circuit includes a dummy bitline having a substantially same or greater electrical characteristic of the bitline. The reference circuit includes a dummy bitline precharge circuit configured to charge the dummy bitline to the voltage in the standby state.

Abstract translation: 提供了用于操作存储器的存储器和方法。 存储器包括位线和耦合到位线的至少一个存储器单元。 位线预充电电路被配置为为存储器访问预充电位线，并且停用以将位线浮置在待机状态。 参考电路被配置为将负载电路充电到待机状态的电压。 在一个示例中，负载电路包括具有基本相同或更大的位线电特性的虚拟位线。 参考电路包括虚拟位线预充电电路，其被配置为将虚拟位线充电至待机状态的电压。

公开(公告)号：US20160351250A1

公开(公告)日：2016-12-01

申请号：US14720930

申请日：2015-05-25

Applicant: QUALCOMM Incorporated

Inventor： Venkatasubramanian NARAYANAN ,  Alex Dongkyu PARK

IPC: G11C11/417 ,  H01L27/11

CPC classification number: G11C11/417 ,  G11C11/419 ,  G11C29/04 ,  G11C29/12005 ,  G11C29/50004 ,  G11C2029/0401 ,  G11C2029/1204 ,  H01L27/1116

Abstract: A static random access memory (SRAM) includes a first bitcell and a second bitcell. The first bitcell includes an aging transistor and the second bitcell includes a non-aging transistor. An aging sensor is coupled between the first bitcell and the second bitcell to determine an amount of aging associated with the aging transistor. In one aspect, the amount of aging associated with the aging transistor is determined based on a difference between a voltage or current associated with the aging transistor and a voltage or current associated with the non-aging transistor.

Abstract translation: 静态随机存取存储器（SRAM）包括第一位单元和第二位单元。 第一位单元包括老化晶体管，第二位单元包括非老化晶体管。 老化传感器耦合在第一位单元和第二位单元之间以确定与老化晶体管相关联的老化量。 在一个方面，与老化晶体管相关联的老化量基于与老化晶体管相关的电压或电流与与非老化晶体管相关联的电压或电流之间的差来确定。