公开(公告)号：US20230238925A1

公开(公告)日：2023-07-27

申请号：US17648958

申请日：2022-01-26

Applicant: QUALCOMM Incorporated

Inventor： Dongyang TANG ,  Xinwang ZHANG ,  ChienChung YANG ,  Earl SCHREYER ,  Sherif GALAL

IPC: H03F3/217

CPC classification number: H03F3/217 ,  H03F2200/03

Abstract: Aspects of the present disclosure relate to apparatus and methods for dynamically adjusting the common-mode input signal of a power amplifier, such as a class-D power amplifier. One example power amplifier circuit generally includes a first amplifier having a signal input and a power input; and a common-mode adjustment circuit having a first input coupled to the power input of the first amplifier, having an output coupled to the signal input of the first amplifier, and being configured to generate a common-mode signal to apply to the signal input of the first amplifier, based on a power supply voltage on the power input of the first amplifier.

公开(公告)号：US20230058434A1

公开(公告)日：2023-02-23

申请号：US17404862

申请日：2021-08-17

Applicant: QUALCOMM Incorporated

Inventor： ChienChung YANG ,  Dongyang TANG ,  Sherif GALAL ,  Xinwang ZHANG ,  Subbarao Surendra CHAKKIRALA ,  Pradeep SILVA

IPC: H03F1/32 ,  H03F3/217

Abstract: A class-D amplifier including a pulse width modulator including an input configured to receive a first signal based on an input signal, and an output configured to generate a pulse width modulated (PWM) signal; an H-bridge including an input coupled to an output of the pulse width modulator and an output coupled to a load, wherein the H-bridge is configured to generate an output signal across the load based on the PWM signal; and a deadtime compensation circuit coupled to the H-bridge, wherein the deadtime compensation circuit is configured to compensate for deadtime distortion in the output signal. The deadtime compensation circuit may be a feedback circuit between an output of the H-bridge and an input of the pulse width modulator, a pulse modification circuit at the output of the pulse width modulator, or an offset signal generating circuit providing an offset signal to the pulse width modulator.