公开(公告)号：US10325648B2

公开(公告)日：2019-06-18

申请号：US15379285

申请日：2016-12-14

Applicant: QUALCOMM Incorporated

Inventor： Darshit Mehta ,  Chulmin Jung ,  Po-Hung Chen

IPC: G11C11/00 ,  G11C11/419 ,  G06F3/06 ,  G11C7/10

Abstract: The apparatus provided may be a memory circuit. The memory circuit includes a memory cell. The memory cell has a bitline. The memory circuit also includes a write driver. The write driver is configured to drive the bitline to write a bit to the memory cell during a write operation. The write driver is also configured to float the bitline to mask the bit during a read operation. The write driver may use NMOS pullup transistors.