-
公开(公告)号:US20170288398A1
公开(公告)日:2017-10-05
申请号:US15088035
申请日:2016-03-31
Applicant: QUALCOMM Incorporated
Inventor: Eugene Robert WORLEY , Reza JALILIZEINALI , Sreeker DUNDIGAL , Wen-Yi CHEN , Krishna Chaitanya CHILLARA , Taeghyun KANG
IPC: H02H9/04 , H03K19/0185 , H03M9/00
CPC classification number: H02H9/046 , H03K19/00315 , H03K19/018528 , H03K19/018592 , H03M9/00
Abstract: A method of protecting a serializer/deserializer (SERDES) differential input/output (I/O) circuit includes detecting an electrostatic discharge event. The method also includes selectively disengaging a power supply terminal from a pair of I/O transistors of the SERDES differential I/O circuit in response to the detected electrostatic discharge event. The method further includes selectively disengaging a ground terminal from the pair of I/O transistors of the SERDES differential I/O circuit in response to the detected electrostatic discharge event.
-
公开(公告)号:US20150084161A1
公开(公告)日:2015-03-26
申请号:US14038663
申请日:2013-09-26
Applicant: QUALCOMM Incorporated
Inventor: Eugene Robert WORLEY , Reza JALILIZEINALI , Sreeker DUNDIGAL
CPC classification number: H01L23/60 , H01L27/0285 , H01L27/0682 , H01L2924/0002 , H02H9/046 , H01L2924/00
Abstract: A system interconnect includes a first resistor-capacitor (RC) clamp having a first RC time constant. The system interconnect also includes second RC clamps having a second RC time constant. The first and second RC clamps are arranged along the system interconnect. In addition, the first RC time constant is different from the second RC time constant.
Abstract translation: 系统互连包括具有第一RC时间常数的第一电阻器 - 电容(RC)钳位。 系统互连还包括具有第二RC时间常数的第二RC钳位。 第一和第二RC夹具沿着系统互连排列。 另外,第一RC时间常数与第二RC时间常数不同。
-