公开(公告)号：US20240320408A1

公开(公告)日：2024-09-26

申请号：US18187198

申请日：2023-03-21

Applicant: QUALCOMM Incorporated

Inventor： Gokce SARAR ,  Guillaume SHIPPEE ,  Rhys BUGGY ,  Santanu PATTANAYAK ,  Tushit JAIN ,  Suman Kumar GUNNALA ,  Kumar RAJ ,  Vatsal Nimeshkumar THAKKAR

IPC: G06F30/333 ,  G06N3/084

CPC classification number: G06F30/333 ,  G06N3/084

Abstract: Certain aspects of the present disclosure provide techniques and apparatus for testing integrated circuit designs. An example method generally includes generating a coverage matrix associated with a plurality of test cases for an integrated circuit and coverage points associated with each test case of the plurality of test cases. A subset of the plurality of test cases is selected for execution based on weights associated with each test case of the plurality of test cases and a threshold weight value. Generally, the weights associated with each test case comprise weights in a machine learning model trained based on the coverage matrix. The integrated circuit may be tested based on the selected subset of test cases.