ERROR CORRECTING CODE TESTING
    1.
    发明申请

    公开(公告)号:US20180331692A1

    公开(公告)日:2018-11-15

    申请号:US15594322

    申请日:2017-05-12

    CPC classification number: H03M13/015 G06F11/2215 H03M13/6566

    Abstract: Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of testing error-correcting code (ECC) logic. The method includes receiving data for storage in a memory. The method further includes receiving an address indicating a location in the memory to store the data. The method further includes determining if the received address matches at least one of one or more test addresses. The method further includes operating the ECC logic in a normal mode when the received address does not match at least one of the one or more test addresses. The method further includes operating the ECC logic in a test mode when the received address does match at least one of the one or more test addresses.

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