公开(公告)号：US20240211312A1

公开(公告)日：2024-06-27

申请号：US18086611

申请日：2022-12-21

Applicant: QUALCOMM Incorporated

Inventor： Weiliang ZENG ,  Christopher LOTT ,  Edward TEAGUE ,  Yang YANG ,  Wonseok JEON ,  Muntasir Amin MALLICK ,  Mukul GAGRANI ,  Piero ZAPPI ,  Joseph Binamira SORIAGA

IPC: G06F9/50

CPC classification number: G06F9/5027

Abstract: A processor-implemented method for compiler optimization using node symmetry includes receiving a representation of an artificial neural network (ANN) include multiple nodes coupled via multiple edges. One or more symmetric sets of nodes are determined based on one or more of a set of attributes for each node or a connectivity of the nodes via the edges. One or more of an order or a schedule for executing the nodes is generated based on the one or more symmetric sets of nodes.