公开(公告)号：US11669333B2

公开(公告)日：2023-06-06

申请号：US15963126

申请日：2018-04-26

Applicant: QUALCOMM Incorporated

Inventor： Rodney Wayne Smith ,  Raghavan Madhavan ,  Luke Yen ,  Shivam Priyadarshi ,  Yusuf Cagatay Tekmen

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/3851 ,  G06F9/3802

Abstract: In certain aspects of the disclosure, an apparatus comprises a first scheduling pool associated with a first minimum scheduling latency and a second scheduling pool associated with a second minimum scheduling latency, the second minimum scheduling latency greater than the first minimum scheduling latency. A common instruction picker is coupled to both the first scheduling pool and the second scheduling pool. The common instruction picker may be configured to select a first instruction from the first scheduling pool and a second instruction from the second scheduling pool, and then choose either the first instruction or second instruction for dispatch according to a picking policy.