公开(公告)号：US11791272B2

公开(公告)日：2023-10-17

申请号：US17191557

申请日：2021-03-03

Applicant: QUALCOMM Incorporated

Inventor： Rong Zhou ,  William M. Aderholdt

IPC: H01L23/538 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/5386 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0655 ,  H01L2224/16157 ,  H01L2224/1712 ,  H01L2924/37001

Abstract: An integrated circuit (IC) package including ICs with multi-row columnar die interconnects has increased die-to-die (D2D) interconnect density in a conductive layer. Positioning the die interconnects in die interconnect column clusters, that each include a plurality of die interconnect rows and two columns, reduces the linear dimension occupied by the die interconnects and leaves room for more D2D interconnects. A die interconnect column cluster pitch is a distance between columns of adjacent die interconnect column clusters and this distance is greater than a die interconnect pitch between columns within the column clusters. Die interconnects may be disposed in the space between the multi-row column clusters and additional die interconnects can be disposed at the D2D interconnect pitch between the die interconnect column clusters. IC packages with ICs including the multi-row columnar die interconnects have a greater number of D2D interconnects for better IC integration.