I3C CLOCK GENERATOR
    1.
    发明申请
    I3C CLOCK GENERATOR 审中-公开

    公开(公告)号:US20190129464A1

    公开(公告)日:2019-05-02

    申请号:US16162564

    申请日:2018-10-17

    Abstract: System, methods and apparatus are described that enable the reliable generation of pulses in a clock signal transmitted over an I3C bus. In various aspects of the disclosure, a method of data communications may be performed by a master device to generate a clock signal to be transmitted on a serial bus. The method includes calculating a divisor based on frequency of a first clock signal and duration of a first pulse to be transmitted in a second clock signal over a clock line of the serial bus, using the divisor to divide the first clock signal to obtain a divided clock signal, and generating the first pulse using the divided clock signal.

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