SECURE ACCESS FOR SYSTEM POWER MANAGEMENT INTERFACE (SPMI) DURING BOOT

    公开(公告)号:US20200042750A1

    公开(公告)日:2020-02-06

    申请号:US16052892

    申请日:2018-08-02

    Abstract: A storage device is pre-loaded with an access block including a list of device addresses with which the device is either permitted or not permitted to communicate over a shared bus prior to a bootloader being initiated on the device. A communication circuit is coupled to the storage device, and the circuit is adapted to: (a) obtain a first command to be transmitted over the shared bus to a first device address; (b) determine whether the first device address is in the list of device addresses in the access block; and (c) allow or prevent transmission of the first command over the shared bus based on whether the firt device address is in the list of device addresses. The list of device addresses is bypassed or ignored after the bootloader procedure is completed.

    GENERAL PURPOSE INPUT OUTPUT TRIGGERED INTERFACE MESSAGE

    公开(公告)号:US20190317911A1

    公开(公告)日:2019-10-17

    申请号:US16037802

    申请日:2018-07-17

    Abstract: Systems, methods, and apparatus for communicating a control signal between device components are provided. Within an apparatus, an integrated circuit (IC) sends a control signal to a system on chip (SoC). The control signal requests enablement or disablement of one or more resources corresponding to the IC. Thereafter, a converting circuit within the SoC converts the control signal from the IC into a command to be transmitted to one or more devices. The converting circuit then transmits the command to the one or more devices via a bus coupling the SoC to the one or more devices. The one or more devices includes one or more power management integrated circuits (PMICs) configured to control the one or more resources. As such, the one or more PMICs enable or disable the one or more resources corresponding to the IC based on the command

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