公开(公告)号：US20210225435A1

公开(公告)日：2021-07-22

申请号：US17223764

申请日：2021-04-06

Applicant: Qualcomm Incorporated

Inventor： Hoan Huu NGUYEN ,  Francois Ibrahim ATALLAH ,  Keith Alan BOWMAN ,  Daniel YINGLING ,  Jihoon JEONG ,  Yu PU

IPC: G11C11/417 ,  G11C7/06 ,  G11C7/10 ,  G11C7/22 ,  G11C11/418 ,  G11C11/419

Abstract: A dual-mode memory is provided that includes a self-timed clock circuit for asserting a sense enable signal for a sense amplifier. In a low-bandwidth read mode, the self-timed clock circuit asserts the sense enable signal only once during a memory clock cycle. The sense amplifier then senses only a single bit from a group of multiplexed columns. In a high-bandwidth read mode, the self-timed clock circuit successively asserts the sense enable signal so that the sense amplifier successively senses bits from the multiplexed columns.