METHOD, PROCESSING UNIT AND DATA PROCESSING SYSTEM FOR MICROPROCESSOR COMMUNICATION IN A MULTI-PROCESSOR SYSTEM
    1.
    发明申请
    METHOD, PROCESSING UNIT AND DATA PROCESSING SYSTEM FOR MICROPROCESSOR COMMUNICATION IN A MULTI-PROCESSOR SYSTEM 失效
    多处理器系统中微处理器通信的方法,处理单元和数据处理系统

    公开(公告)号:US20080109816A1

    公开(公告)日:2008-05-08

    申请号:US11971959

    申请日:2008-01-10

    IPC分类号: G06F9/50

    CPC分类号: G06F9/30101

    摘要: A processor communication register (PCR) contained in each processor within a multiprocessor system provides enhanced processor communication. Each PCR stores identical processor communication information that is useful in pipelined or parallel multi-processing. Each processor has exclusive rights to store to a sector within each PCR and has continuous access to read the contents of its own PCR. Each processor updates its exclusive sector within all of the PCRs, instantly allowing all of the other processors to see the change within the PCR data, and bypassing the cache subsystem. Efficiency is enhanced within the multiprocessor system by providing processor communications to be immediately transferred into all processors without momentarily restricting access to the information or forcing all the processors to be continually contending for the same cache line, and thereby overwhelming the interconnect and memory system with an endless stream of load, store and invalidate commands.

    摘要翻译: 包含在多处理器系统内的每个处理器中的处理器通信寄存器(PCR)提供增强的处理器通信。 每个PCR存储在流水线或并行多处理中有用的相同的处理器通信信息。 每个处理器具有存储在每个PCR内的扇区的专有权利,并且具有连续访问以读取其自己的PCR的内容。 每个处理器在所有PCR中更新其独占扇区,立即允许所有其他处理器查看PCR数据中的更改,并绕过缓存子系统。 通过提供处理器通信以立即转移到所有处理器中而不会立即限制对信息的访问或迫使所有处理器连续地竞争相同的高速缓存行,从而将互连和存储系统压倒在一起,从而在多处理器系统中提高效率 无限流的加载,存储和无效命令。