公开(公告)号：US20240291498A1

公开(公告)日：2024-08-29

申请号：US18114900

申请日：2023-02-27

Applicant: RAYTHEON COMPANY

Inventor： Paul T. Hartin ,  Kyle A. Steiner ,  Robert John Casey ,  Andres Lugo

IPC: H03M1/10

CPC classification number: H03M1/1009

Abstract: A circuit and method for calibrating ADCs and DACs generates a calibration signal by a DAC; filters spurs from the calibration signal from the DAC to generate a filtered calibration signal; calculates ADC interleave calibration factors to improve performance metrics of the ADC, responsive to the filtered calibration signal; receives the calibration signal from the DAC and calculates DAC interleave calibration factors; generates a calibration signal with improved performance metrics, responsive to the DAC interleave calibration factors received from the ADC; and repeats the process until the performance of the ADC and DAC are within a predetermined range.

公开(公告)号：US12301245B2

公开(公告)日：2025-05-13

申请号：US18114900

申请日：2023-02-27

Applicant: RAYTHEON COMPANY

Inventor： Paul T. Hartin ,  Kyle A. Steiner ,  Robert John Casey ,  Andres Lugo

IPC: H03M1/10

Abstract: A circuit and method for calibrating ADCs and DACs generates a calibration signal by a DAC; filters spurs from the calibration signal from the DAC to generate a filtered calibration signal; calculates ADC interleave calibration factors to improve performance metrics of the ADC, responsive to the filtered calibration signal; receives the calibration signal from the DAC and calculates DAC interleave calibration factors; generates a calibration signal with improved performance metrics, responsive to the DAC interleave calibration factors received from the ADC; and repeats the process until the performance of the ADC and DAC are within a predetermined range.