公开(公告)号：US3879663A

公开(公告)日：1975-04-22

申请号：US40479973

申请日：1973-10-09

Applicant: RCA CORP

Inventor： MCGROGAN JR ELLWOOD PATRICK

IPC: H03M3/02 ,  H03K13/22

CPC classification number: H03M3/024

Abstract: A delta modulation system for encoding and decoding an analog input signal. The encoder includes a comparator to generate an encoded digital signal representing the analog input signal and a duty cycle circuit to represent the slope of the analog input signal. The decoder utilizes a similar duty cycle circuit which operates on the encoded digital signal received in order to translate the encoded signal into an analog output signal.

Abstract translation: 一种用于对模拟输入信号进行编码和解码的增量调制系统。 编码器包括比较器，用于产生表示模拟输入信号的编码数字信号和用于表示模拟输入信号的斜率的占空比电路。 解码器利用类似的占空比电路，该电路对所接收的编码数字信号进行操作，以将编码的信号转换为模拟输出信号。

公开(公告)号：US3863215A

公开(公告)日：1975-01-28

申请号：US37622273

申请日：1973-07-03

Applicant: RCA CORP

Inventor： MCGROGAN JR ELLWOOD PATRICK

IPC: H04L1/08 ,  G06F11/08 ,  G08C25/00

CPC classification number: H04L1/08

Abstract: A detector for repetitive cyclically permutable digital codes. The detector utilizes two shift registers, serially connected to provide two delayed versions of a repetitive code. A majority vote circuit responsive to the undelayed code and two delayed codes is used for forward error reduction. A run length counter responsive to the majority vote signal increments a count each time corresponding bits from the majority signal and a delayed version thereof agree. At a specified count, the code is read out with a high probability of accuracy.

Abstract translation: 用于重复循环置换数字码的检测器。 该检测器使用两个移位寄存器，串行连接以提供两个延迟版本的重复代码。 响应于未延迟代码和两个延迟代码的多数投票电路用于前向错误减少。 响应于多数投票信号的游程长度计数器每当来自多数信号的相应位和其延迟版本一致时增加计数。 在指定的计数下，以高精度的概率读出代码。