METHOD AND SYSTEM FOR CONFIDENTIAL COMPUTING

    公开(公告)号:US20240296245A1

    公开(公告)日:2024-09-05

    申请号:US18658736

    申请日:2024-05-08

    CPC classification number: G06F21/6227

    Abstract: A method for confidential computing is provided, which is performed by a security core including one or more processor, and includes storing first encrypted data associated with a first tenant in a first memory, in which the first encrypted data is obtained by performing encryption of the first plaintext data using a first encryption key associated with the first tenant, in response to receiving a request to access the first plaintext data, decrypting the first encrypted data using the first encryption key so as to generate the first plaintext data, and providing the first plaintext data to a main core that processes data stored in the first memory.

    Method and system for runtime integrity check

    公开(公告)号:US11874953B1

    公开(公告)日:2024-01-16

    申请号:US18338258

    申请日:2023-06-20

    CPC classification number: G06F21/64 G06F21/602 G06F21/74 G06F21/78

    Abstract: A method for runtime integrity check, performed by a security core including one or more processors includes storing a first output value, which is generated by using a one-way encryption algorithm based on first data and a first encryption key managed by an encryption key manager accessible by the security core, in a main memory that is a volatile memory in association with the first data, generating a second output value for the first data based on the first data and the first encryption key by using the one-way encryption algorithm, and checking for possible tampering of the first data stored in the main memory by comparing the first output value with the generated second output value.

    METHOD AND SYSTEM FOR RUNTIME INTEGRITY CHECK

    公开(公告)号:US20240256714A1

    公开(公告)日:2024-08-01

    申请号:US18521890

    申请日:2023-11-28

    CPC classification number: G06F21/64 G06F21/602 G06F21/74 G06F21/78

    Abstract: A method for runtime integrity check, performed by a security core including one or more processors includes storing a first output value, which is generated by using a one-way encryption algorithm based on first data and a first encryption key managed by an encryption key manager accessible by the security core, in a main memory that is a volatile memory in association with the first data, generating a second output value for the first data based on the first data and the first encryption key by using the one-way encryption algorithm, and checking for possible tampering of the first data stored in the main memory by comparing the first output value with the generated second output value.

    Processing device and method for secure booting thereof

    公开(公告)号:US11983274B1

    公开(公告)日:2024-05-14

    申请号:US18511927

    申请日:2023-11-16

    Inventor: Myunghoon Choi

    CPC classification number: G06F21/572 G06F9/4401 G06F21/575 G06F21/64

    Abstract: Provided are a processing device and a method for secure booting thereof, in which the processing device includes a security core that operates a Root of Trust and sequentially performs an integrity check on first firmware and second firmware through the Root of Trust, a main core that sequentially operates the first firmware and the second firmware, a non-volatile memory storing the first firmware and the second firmware, and a first volatile memory that loads the first firmware and the second firmware from a main core domain of the main core and operates the loaded firmware with the main core.

    Method and system for confidential computing

    公开(公告)号:US12008132B1

    公开(公告)日:2024-06-11

    申请号:US18338264

    申请日:2023-06-20

    CPC classification number: G06F21/6227

    Abstract: A method for confidential computing is provided, which is performed by a security core including one or more processor, and includes storing first encrypted data associated with a first tenant in a first memory, in which the first encrypted data is obtained by performing encryption of the first plaintext data using a first encryption key associated with the first tenant, in response to receiving a request to access the first plaintext data, decrypting the first encrypted data using the first encryption key so as to generate the first plaintext data, and providing the first plaintext data to a main core that processes data stored in the first memory.

    ELECTRONIC DEVICE HAVING A PLURALITY OF CHIPLETS AND METHOD FOR BOOTING THEREOF

    公开(公告)号:US20250068521A1

    公开(公告)日:2025-02-27

    申请号:US18809049

    申请日:2024-08-19

    Abstract: An electronic device comprises a main chiplet including a first memory and at least one sub-chiplet including a second memory, wherein the main chiplet is configured to initialize a first interface for inter-chiplet connection based on first boot firmware stored in the first memory in response to receiving booting signal, acquire third boot firmware stored in an external memory, initialize a second interface for communication between an external device and the main chiplet based on the third boot firmware, set a configuration for interconnection between the main chiplet and the at least one sub-chiplet, initialize a third memory included in the main chiplet, and load at least one of an application firmware or an operating system to the third memory, and the at least one sub-chiplet is configured to initialize the first interface based on second boot firmware stored in the second memory in response to receiving the booting signal.

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