公开(公告)号：US10424665B2

公开(公告)日：2019-09-24

申请号：US15690233

申请日：2017-08-29

Applicant: Renesas Electronics Corporation

Inventor： Shinichi Okamoto ,  Tsutomu Okazaki

IPC: H01L29/78 ,  H01L27/088 ,  H01L21/8234

Abstract: There is improved performance of a semiconductor device including a fin-type low-withstand-voltage transistor and a fin-type high-withstand-voltage transistor. A low-withstand-voltage transistor is formed on each of a plurality of first fins isolated from each other by a first element isolation film, and a high-withstand-voltage transistor, which has a channel region including tops and side surfaces of a plurality of second fins and a top of a semiconductor substrate between the second fins adjacent to each other, is formed. At this time, a top of a second element isolation film surrounding the second fins including part of the channel region of one high-withstand-voltage transistor is lower than a top of the first element isolation film.

公开(公告)号：US10651094B2

公开(公告)日：2020-05-12

申请号：US16291620

申请日：2019-03-04

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Hideki Aono ,  Tetsuya Yoshida ,  Makoto Ogasawara ,  Shinichi Okamoto

IPC: H01L21/8238 ,  H01L21/762 ,  H01L21/265 ,  H01L29/66

Abstract: To provide a semiconductor device having improved reliability. An element isolation region comprised mainly of silicon oxide is buried in a trench formed in a semiconductor substrate. The semiconductor substrate in an active region surrounded by the element isolation region has thereon a gate electrode for MISFET via a gate insulating film. The gate electrode partially extends over the element isolation region and the trench has a nitrided inner surface. Below the gate electrode, fluorine is introduced into the vicinity of a boundary between the element isolation region and a channel region of MISFET.