公开(公告)号：US20240311327A1

公开(公告)日：2024-09-19

申请号：US18426261

申请日：2024-01-29

Applicant: RICHTEK TECHNOLOGY CORP.

Inventor： Ching-Yi Chen ,  Hsing-Shen Huang ,  Bo-Jyun Huang

IPC: G06F13/42 ,  G06F1/10 ,  G06F13/40

CPC classification number: G06F13/4256 ,  G06F1/10 ,  G06F13/4072

Abstract: A bus configuration system includes a plurality of driver integrated circuits (ICs) coupled sequentially on a daisy chain, and a bus controller coupled to the plurality of driver ICs. Each driver IC includes a plurality of ports. The bus controller is used to generate a port definition code for configuring each port of the each driver IC. The bus controller includes a clock output port used to output a clock signal and a data output port used to output a data signal. When a port of the plurality of ports detects the clock signal, the port is configured as a clock input port.