公开(公告)号：US09947283B2

公开(公告)日：2018-04-17

申请号：US15217060

申请日：2016-07-22

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Chien-Chung Chen ,  Hsing-Shen Huang

IPC: G06F3/038 ,  G09G5/00 ,  G09G3/36

CPC classification number: G09G3/3677 ,  G09G2330/12

Abstract: The present invention provides a display apparatus, including: a display panel circuit which includes a panel load line and performs a scanning display operation; and a panel driving circuit. The panel driving circuit determines at least a test phase and a scanning display phase according to a display control signal generated by a timing control circuit, wherein the test phase is a partial time period when the panel driving circuit does not perform the scanning display operation. The panel driving circuit generates a test driving signal on the panel load line, and detects an electronic characteristic of the display panel circuit so as to determine a failure item thereof during the test phase according to a pre-determined test instruction. The panel driving circuit generates a display driving signal on the panel load line for the scanning display operation according to the display control signal during the scanning display phase.

公开(公告)号：US20180197498A1

公开(公告)日：2018-07-12

申请号：US15915984

申请日：2018-03-08

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Chien-Chung Chen ,  Hsing--Shen Huang

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G2330/12

Abstract: The present invention provides a display apparatus, including: a display panel circuit which includes a panel load line and performs a scanning display operation; and a panel driving circuit. The panel driving circuit determines at least a test phase and a scanning display phase according to a display control signal generated by a timing control circuit, wherein the test phase is a partial time period when the panel driving circuit does not perform the scanning display operation. The panel driving circuit generates a test driving signal on the panel load line, and detects an electronic characteristic of the display panel circuit so as to determine a failure item thereof during the test phase according to a pre-determined test instruction. The panel driving circuit generates a display driving signal on the panel load line for the scanning display operation according to the display control signal during the scanning display phase.

公开(公告)号：US10529295B2

公开(公告)日：2020-01-07

申请号：US15980269

申请日：2018-05-15

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Chien-Chung Chen ,  Hsing-Shen Huang

IPC: G09G3/36

Abstract: A display apparatus includes a timing controller and a gate-driver on array (GOA) control circuit. The timing controller generates a frame synchronization signal. The GOA control circuit is coupled to the timing controller and includes a scan signal management circuit and a level shifter. The scan signal management circuit generates a scan signal management signal according to the frame synchronization signal, a predetermined panel parameter, and an operation clock signal. The scan signal management circuit includes a storage unit which stores the predetermined panel parameter. The level shifter generates a scan control signal according to the scan signal management signal to control a GOA of a display panel circuit. The GOA generates a gate driving signal to control a vertical scan operation of the display panel circuit.

公开(公告)号：US10170070B2

公开(公告)日：2019-01-01

申请号：US15915984

申请日：2018-03-08

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Chien-Chung Chen ,  Hsing--Shen Huang

IPC: G09G3/36

Abstract: The present invention provides a display apparatus, including: a display panel circuit which includes a panel load line and performs a scanning display operation; and a panel driving circuit. The panel driving circuit determines at least a test phase and a scanning display phase according to a display control signal generated by a timing control circuit, wherein the test phase is a partial time period when the panel driving circuit does not perform the scanning display operation. The panel driving circuit generates a test driving signal on the panel load line, and detects an electronic characteristic of the display panel circuit so as to determine a failure item thereof during the test phase according to a pre-determined test instruction. The panel driving circuit generates a display driving signal on the panel load line for the scanning display operation according to the display control signal during the scanning display phase.

公开(公告)号：US20180366082A1

公开(公告)日：2018-12-20

申请号：US15980269

申请日：2018-05-15

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Chien-Chung Chen ,  Hsing-Shen Huang

IPC: G09G3/36

CPC classification number: G09G3/3674 ,  G09G3/3266 ,  G09G2310/0213 ,  G09G2310/0267 ,  G09G2310/0289 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2330/027 ,  G09G2354/00

Abstract: A display apparatus includes a timing controller and a gate-driver on array (GOA) control circuit. The timing controller generates a frame synchronization signal. The GOA control circuit is coupled to the timing controller and includes a scan signal management circuit and a level shifter. The scan signal management circuit generates a scan signal management signal according to the frame synchronization signal, a predetermined panel parameter, and an operation clock signal. The scan signal management circuit includes a storage unit which stores the predetermined panel parameter. The level shifter generates a scan control signal according to the scan signal management signal to control a GOA of a display panel circuit. The GOA generates a gate driving signal to control a vertical scan operation of the display panel circuit.

公开(公告)号：US20170221440A1

公开(公告)日：2017-08-03

申请号：US15217060

申请日：2016-07-22

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Chien-Chung Chen ,  Hsing--Shen Huang

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G2330/12

Abstract: The present invention provides a display apparatus, including: a display panel circuit which includes a panel load line and performs a scanning display operation; and a panel driving circuit. The panel driving circuit determines at least a test phase and a scanning display phase according to a display control signal generated by a timing control circuit, wherein the test phase is a partial time period when the panel driving circuit does not perform the scanning display operation. The panel driving circuit generates a test driving signal on the panel load line, and detects an electronic characteristic of the display panel circuit so as to determine a failure item thereof during the test phase according to a pre-determined test instruction. The panel driving circuit generates a display driving signal on the panel load line for the scanning display operation according to the display control signal during the scanning display phase.