摘要:
A processing unit, method, and graphics processing system are provided for processing a plurality of frames of graphics data. For instance, the processing unit can include a first plurality of graphics processing units (GPUs), a second plurality of GPUs, and a plurality of compositors. The first plurality of GPUs can be configured to process a first frame of graphics data. Likewise, the second plurality of GPUs can be configured to process a second frame of graphics data. Further, each compositor in the plurality of compositors can be coupled to a respective GPU from the first and second pluralities of GPUs, where the plurality of compositors is configured to sequentially pass the first and second frames of graphics data to a display module.
摘要:
A processing unit, method, and graphics processing system are provided for processing a plurality of frames of graphics data. For instance, the processing unit can include a first plurality of graphics processing units (GPUs), a second plurality of GPUs, and a plurality of compositors. The first plurality of GPUs can be configured to process a first frame of graphics data. Likewise, the second plurality of GPUs can be configured to process a second frame of graphics data. Further, each compositor in the plurality of compositors can be coupled to a respective GPU from the first and second pluralities of GPUs, where the plurality of compositors is configured to sequentially pass the first and second frames of graphics data to a display module.
摘要:
A method and system for rendering a feature, such as a line, for display on an array of pixels. With this method, the line is identified on the pixel array, the line is expanded into a polygon, and color values are determined for the pixels within the polygon. Also, an antialiasing region is identified in the polygon, and blend values are computed for the pixels in this antialiasing region. Then, the color values determined for the pixels in the antialiasing region are modified as a function of these computed blend values. The pixels in the antialiasing region may then be shown at their modified color values, while the pixels that are in the polygon but not in the antialising region may be shown at their original determined color value. Preferably, the blend values for the pixels in the antialiasing region are calculated as a function of the locations of the pixels in that region. For example, the blend value for each of these pixels may be calculated as a function of four values, each one representing the Manhattan distance from the pixel to a respective one of the edges of the polygon. Also, preferably the antialiasing region has a uniform width, and this region extends inward from side edges and outward from end edges of the formed polygon.
摘要:
A method of managing resources is provided. The method includes identifying a resource associated with a processor responsive to an impending transition, and copying the identified resource from a memory associated with the GPU or to the memory associated with the GPU.
摘要:
A method of processing commands is provided. The method includes holding commands in queues and executing the commands in an order based on their respective priority. Commands having the same priority are held in the same queue.
摘要:
A method of processing commands is provided. The method includes holding commands in queues and executing the commands in an order based on their respective priority. Commands having the same priority are held in the same queue.
摘要:
A system and method for applying non-homogeneous properties to multiple video processing units (VPUs) in a multiple VPU system are described. Respective VPUs in the system cooperate to produce a frame to be displayed. In various embodiments, data output by different VPUs in the system is combined, or merged, or composited to produce a frame to be displayed. In load balancing modes, each VPU in the system performs different tasks as part of rendering a same frame, and therefore typically executes different commands. In various embodiments, efficiency of the system is enhanced by forming a single command buffer for execution by all of the VPUs in the system even though each VPU may have a different set of commands to execute in the command buffer.