公开(公告)号：US20120176264A1

公开(公告)日：2012-07-12

申请号：US13422833

申请日：2012-03-16

申请人： Rakhel Kumar PARIDA ,  Ankur BAL ,  Anil KUMAR ,  Anupam JAIN

发明人： Rakhel Kumar PARIDA ,  Ankur BAL ,  Anil KUMAR ,  Anupam JAIN

IPC分类号： H03M1/66

CPC分类号： H03M7/12 ,  H03M1/0665 ,  H03M1/0673 ,  H03M1/74 ,  H03M7/14

摘要： A dynamic element matching (DEM) scheme is implemented in a crawling code generator for converting a b-bit binary input code into a (2b−1)-bit digital output code. A random generator determines for every conversion step a direction. A decimal difference between the current and previous binary input is calculated. The new crawling output code is determined based on the previous crawling output code, the direction and the decimal difference. The DEM scheme is used in a digital-to-analog converter such that the crawling output code switches digital-to-analog converting elements that output analog signals that are then summed to be the final analog signal.

摘要翻译： 用于将b位二进制输入代码转换为（2b-1）位数字输出代码的爬行码生成器中实现动态元素匹配（DEM）方案。 随机生成器确定每个转换步骤一个方向。 计算当前和前一个二进制输入之间的十进制差值。 新的爬行输出代码基于先前的爬行输出代码，方向和小数差来确定。 DEM方案用于数模转换器，使得爬行输出码切换输出模拟信号的数模转换元件，然后将模拟信号相加为最终的模拟信号。

公开(公告)号：US20110004647A1

公开(公告)日：2011-01-06

申请号：US12565596

申请日：2009-09-23

申请人： Rakhel Kumar PARIDA ,  Ankur BAL ,  Anupam Jain

发明人： Rakhel Kumar PARIDA ,  Ankur BAL ,  Anupam Jain

IPC分类号： G06F17/17 ,  H03K5/00

CPC分类号： H03H17/0664 ,  H03H17/0282 ,  H03H17/0657 ,  H03H17/0671

摘要： An offset free sinc interpolating filter includes differentiators operating at a first sampling frequency, integrators operating at a second sampling frequency and one or more coefficient multipliers. The coefficient multipliers multiply a received value with a constant coefficient value to generate an output value. The differentiators, integrators and coefficient multipliers can be operatively coupled to each other, either directly or through other components such as adders and delay elements, or by a combination of the two. In operation, an input signal is provided to the sinc interpolating filter at the first sampling frequency. The input signal is processed by the differentiators, integrators and coefficient multipliers to generate an output signal at the second sampling frequency. Once the output signal is generated, the integrators are reset before the next input cycle begins.

摘要翻译： 无偏移的正弦内插滤波器包括以第一采样频率工作的微分器，以第二采样频率工作的积分器和一个或多个系数乘法器。 系数乘法器将接收到的值与常数系数值相乘以产生输出值。 微分器，积分器和系数乘法器可以直接地或通过其他部件（例如加法器和延迟元件）或两者的组合来可操作地耦合。 在操作中，输入信号以第一采样频率提供给正弦内插滤波器。 输入信号由微分器，积分器和系数乘法器处理，以产生第二采样频率的输出信号。 产生输出信号后，积分器在下一个输入周期开始之前被复位。