摘要:
A non-transitory computer-readable recording medium having stored therein a coding program that causes a computer to execute a process. The process includes coding a numerical value to be coded, into a numeric code of base-2n representation; and generating code data that have been added with an instantaneous code indicating the number of digits of the base-2n representation of the numerical value to be coded, wherein “n” is a natural number equal to or greater than 1.
摘要:
An apparatus comprises processing circuitry to perform a conversion operation to convert a floating-point value to a vector comprising a plurality of data elements representing respective bit significance portions of a binary value corresponding to the floating-point value.
摘要:
A data processing system supports vector operands with components representing different bit significance portions of an integer number. Processing circuitry performs a processing operation specified by a program instruction in dependence upon a number of components comprising the vector as specified by metadata for the vector.
摘要:
An apparatus includes processing circuitry to perform one or more arithmetic operations for generating a result value based on at least one operand. For at least one arithmetic operation, the processing circuitry is responsive to programmable significance data indicative of a target significance for the result value, to generate the result value having the target significance. For example, this allows programmers to set a significance boundary for the arithmetic operation so that it is not necessary for the processing circuitry to calculate bit values having a significance outside the specified boundary, enabling a performance improvement.
摘要:
A method and system for binary coded decimal (BCD) to binary conversion. The conversion includes obtaining a BCD significand corresponding to multiple decimal digits; generating, by a BCD/binary hardware converter and based on the BCD significand, multiple binary vectors corresponding to the multiple decimal digits; and calculating, by the BCD/binary hardware converter, a binary output by summing the multiple binary vectors.
摘要:
Error detection using parity compensation in binary coded decimal (BCD) and densely packed decimal (DPD) conversions, including a computer program product having a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving formatted decimal data in a first format, the formatted decimal data consisting of a DPD format data or a BCD format data. One or more first parity bits are generated by converting the received data into a second format of the formatted decimal data, and by determining the parity of the data in the second format. One or more second parity bits are generated directly from the received data. An error flag is set to indicate an error in the data in the second format in response to the first parity bits not being equal to the second parity bits.
摘要:
A method and apparatus for a varying-radix numeration system is described. A method includes receiving a first sequence of values, determining a number of positions for a second sequence of values, and generating the second sequence of values, each value of the second sequence corresponding to a radix, the radix for each value of the second sequence varying over the second sequence in relation to an application value, the application value corresponding to a position in the second sequence and a sum of a set of values in the second sequence.
摘要:
A method for converting from binary to decimal. The method includes receiving a binary number, the binary number including one or more sets of bits. An accumulated sum is set to zero. The accumulated sum is in a binary coded decimal (BCD) format. The following loop is repeated for each set of bits in the binary number in order from the set of bits containing the most significant bit of the binary number to the set of bits containing the least significant bit of the binary number: the accumulated sum is converted into a 5,1 code format resulting in an interim sum. The loop also includes repeating for each next bit in the set in order from the most significant bit to the least significant bit in the set: doubling the interim sum; and replacing the least significant bit of the interim sum with the next bit. The last step in the loop includes converting the interim sum into the BCD format and storing the results of the converting in the accumulated sum. Once all of the sets of bits in the binary number have been processed through the loop, the accumulated sum is output as the final result.
摘要:
A generalized Gray code converter includes a decimal-binary to intermediate-binary converter and an intermediate-binary to Gray code converter. The decimal-binary to intermediate-binary converter is operable to convert a sequence of sets of electrical signals encoded in decimal-binary format (decimal-binary sequence) to a sequence of sets of electrical signals encoded in intermediate-binary format (intermediate sequence). The intermediate-binary to Gray code converter, connected to the decimal-binary to intermediate-binary converter, is operable to convert the intermediate sequence to a sequence of sets of electrical signals encoded in Gray code-binary format (Gray code sequence).
摘要:
A method and apparatus for a varying-radix numeration system is described. A method comprises receiving a first sequence of values, determining a number of positions for a second sequence of values, and generating the second sequence of values, each value of the second sequence corresponding to a radix, the radix for each value of the second sequence varying over the second sequence in relation to an application value, the application value corresponding to a position in the second sequence and a sum of a set of values in the second sequence.