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1.
公开(公告)号:US08868975B2
公开(公告)日:2014-10-21
申请号:US13196459
申请日:2011-08-02
申请人: Ralph E. Bellofatto , Steven M. Douskey , Rudolf A. Haring , Moyra K. McManus , Martin Ohmacht , Dietmar Schmunkamp , Krishnan Sugavanam , Bryan J. Weatherford
发明人: Ralph E. Bellofatto , Steven M. Douskey , Rudolf A. Haring , Moyra K. McManus , Martin Ohmacht , Dietmar Schmunkamp , Krishnan Sugavanam , Bryan J. Weatherford
CPC分类号: G06F11/2242 , G06F11/202
摘要: A system and method for improving the yield rate of a multiprocessor semiconductor chip that includes primary processor cores and one or more redundant processor cores. A first tester conducts a first test on one or more processor cores, and encodes results of the first test in an on-chip non-volatile memory. A second tester conducts a second test on the processor cores, and encodes results of the second test in an external non-volatile storage device. An override bit of a multiplexer is set if a processor core fails the second test. In response to the override bit, the multiplexer selects a physical-to-logical mapping of processor IDs according to one of: the encoded results in the memory device or the encoded results in the external storage device. On-chip logic configures the processor cores according to the selected physical-to-logical mapping.
摘要翻译: 一种用于提高包括主处理器核心和一个或多个冗余处理器核心的多处理器半导体芯片的产率的系统和方法。 第一个测试人员对一个或多个处理器内核进行第一次测试,并在片上非易失性存储器中对第一次测试的结果进行编码。 第二个测试者对处理器核进行第二次测试,并将外部非易失性存储设备的第二次测试结果进行编码。 如果处理器核心故障第二次测试,则设置多路复用器的覆盖位。 响应于覆盖位,多路复用器根据以下之一选择处理器ID的物理到逻辑映射:存储器件中的编码结果或外部存储器件中的编码结果。 片上逻辑根据所选的物理到逻辑映射配置处理器内核。
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2.
公开(公告)号:US20130031418A1
公开(公告)日:2013-01-31
申请号:US13196459
申请日:2011-08-02
申请人: Ralph E. Bellofatto , Steven M. Douskey , Rudolf A. Haring , Moyra K. McManus , Martin Ohmacht , Dietmar Schmunkamp , Krishnan Sugavanam , Bryan J. Weatherford
发明人: Ralph E. Bellofatto , Steven M. Douskey , Rudolf A. Haring , Moyra K. McManus , Martin Ohmacht , Dietmar Schmunkamp , Krishnan Sugavanam , Bryan J. Weatherford
IPC分类号: G06F11/28
CPC分类号: G06F11/2242 , G06F11/202
摘要: A system and method for improving the yield rate of a multiprocessor semiconductor chip that includes primary processor cores and one or more redundant processor cores. A first tester conducts a first test on one or more processor cores, and encodes results of the first test in an on-chip non-volatile memory. A second tester conducts a second test on the processor cores, and encodes results of the second test in an external non-volatile storage device. An override bit of a multiplexer is set if a processor core fails the second test. In response to the override bit, the multiplexer selects a physical-to-logical mapping of processor IDs according to one of: the encoded results in the memory device or the encoded results in the external storage device. On-chip logic configures the processor cores according to the selected physical-to-logical mapping.
摘要翻译: 一种用于提高包括主处理器核心和一个或多个冗余处理器核心的多处理器半导体芯片的产率的系统和方法。 第一个测试人员对一个或多个处理器内核进行第一次测试,并在片上非易失性存储器中对第一次测试的结果进行编码。 第二个测试者对处理器核进行第二次测试,并将外部非易失性存储设备的第二次测试结果进行编码。 如果处理器核心故障第二次测试,则设置多路复用器的覆盖位。 响应于覆盖位,多路复用器根据以下之一选择处理器ID的物理到逻辑映射:存储器件中的编码结果或外部存储器件中的编码结果。 片上逻辑根据所选的物理到逻辑映射配置处理器内核。
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