公开(公告)号：US20200225993A1

公开(公告)日：2020-07-16

申请号：US16743271

申请日：2020-01-15

Applicant: Rambus Inc.

Inventor： Joseph James Tringali ,  Jianbing Chen ,  Evan Lawrence Erickson ,  Keith Lowrey

IPC: G06F9/50 ,  G06F9/54 ,  G06F11/30 ,  G06F12/02 ,  G06N20/00

Abstract: Described are self-learning systems and methods for adaptive management of memory resources within a memory hierarchy. Memory allocations associated with different active functions are organized into blocks for placement in alternative levels in a memory hierarchy optimized for different metrics of e.g. cost and performance. A host processor monitors a performance metric of the active functions, such as the number of instructions per clock cycle, and reorganizes the function-specific blocks among the levels of the hierarchy. Over time, this process tends toward block organizations that improve the performance metric.

公开(公告)号：US11561834B2

公开(公告)日：2023-01-24

申请号：US16743271

申请日：2020-01-15

Applicant: Rambus Inc.

Inventor： Joseph James Tringali ,  Jianbing Chen ,  Evan Lawrence Erickson ,  Keith Lowrey

IPC: G06F9/50 ,  G06F9/54 ,  G06F12/02 ,  G06N20/00 ,  G06F11/30

Abstract: Described are self-learning systems and methods for adaptive management of memory resources within a memory hierarchy. Memory allocations associated with different active functions are organized into blocks for placement in alternative levels in a memory hierarchy optimized for different metrics of e.g. cost and performance. A host processor monitors a performance metric of the active functions, such as the number of instructions per clock cycle, and reorganizes the function-specific blocks among the levels of the hierarchy. Over time, this process tends toward block organizations that improve the performance metric.