公开(公告)号：US11645212B2

公开(公告)日：2023-05-09

申请号：US17504739

申请日：2021-10-19

Applicant: Rambus Inc.

Inventor： Steven C. Woo ,  Thomas Vogelsang ,  Joseph James Tringali ,  Pooneh Safayenikoo

IPC: G06F9/30 ,  G06F13/16 ,  H01L25/18 ,  H01L25/065

CPC classification number: G06F13/1668 ,  H01L25/0657 ,  H01L25/18 ,  H01L2225/06541

Abstract: Processing elements include interfaces that allow direct access to memory banks on one or more DRAMs in an integrated circuit stack. These additional (e.g., per processing element) direct interfaces may allow the processing elements to have direct access to the data in the DRAM stack. Based on the size/type of operands being processed, and the memory bandwidth of the direct interfaces, rate calculation circuitry on the processor die determines the speed each processing element and/or processing nodes within each processing element are operated.