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公开(公告)号:US12300892B2
公开(公告)日:2025-05-13
申请号:US17660386
申请日:2022-04-22
Applicant: Raytheon Company
Inventor: Craig H. McCordic , Michael P. Martinez , Craig Richardson , Mark J. Beaulieu
Abstract: A radar array assembly is provided, comprising a first chassis and a first vertical stiffener. The first chassis is configured to house a first set of array electronics and a second set of array electronics. The first vertical stiffener is disposed within and operably coupled to the first chassis to enable the first chassis to be resistant to buckling and to define a first cavity in which the first set of array electronics is disposed and a second cavity in which the second set of array electronics is disposed, wherein the first vertical stiffener is configured to be embedded within the first set of array electronics and the second set of array electronics, wherein the first vertical stiffener comprises a first integrated cooling manifold configured to cool both the first set of array electronics and the second set of array electronics.
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公开(公告)号:US20250096477A1
公开(公告)日:2025-03-20
申请号:US18370102
申请日:2023-09-19
Applicant: Raytheon Company
Inventor: Paul J. Marchetti , Craig Richardson , Michael A. Toomey
Abstract: A clamping device for securing a first component to a second component is disclosed. The clamping device includes a mounting flange coupled to the first component, a mounting seat coupled to the second component, and a clamping ring configured to be rotatably seated on the mounting flange such that the mounting flange is disposed axially between a first end of the clamping ring and the mounting seat upon assembly. The mounting seat includes a plurality of first locking ramps disposed about a circumference of the mounting seat and extending radially outward from the mounting seat. The clamping ring includes a plurality of second locking ramps disposed about an inner circumference and extending radially inward from a second end of the clamping ring. The plurality of second locking ramps is configured to engage the plurality of first locking ramps upon securing the first component to the second component.
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公开(公告)号:US20250079685A1
公开(公告)日:2025-03-06
申请号:US18457828
申请日:2023-08-29
Applicant: Raytheon Company
Inventor: Michael A. Toomey , Paul J. Marchetti , Craig Richardson , Jonathan J. Flick , Derik S. Thomann
Abstract: A tripod for a transportable SATCOM antenna includes a base with a frame centered on a center axis. A first leg is connected to the frame of the base by a first hinge, a second leg is connected to the frame of the base by a second hinge, and a third leg is connected to the frame of the base by a third hinge. A first strut extends from the first leg to the second leg, a second strut extends from the second leg to the third leg, and a third strut extends from the third leg to the first leg. The first strut, the second strut, and the third strut each include a first strut segment, a second strut segment, and a hinge connecting the first strut segment and the second strut segment. A locking collar is on the first strut segment and extends over the hinge.
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公开(公告)号:US20230344143A1
公开(公告)日:2023-10-26
申请号:US17660386
申请日:2022-04-22
Applicant: Raytheon Company
Inventor: Craig H. McCordic , Michael P. Martinez , Craig Richardson , Mark J. Beaulieu
CPC classification number: H01Q21/0025 , H01Q1/12 , G01S7/027 , G01S2013/0245
Abstract: A radar array assembly is provided, comprising a first chassis and a first vertical stiffener. The first chassis is configured to house a first set of array electronics and a second set of array electronics. The first vertical stiffener is disposed within and operably coupled to the first chassis to enable the first chassis to be resistant to buckling and to define a first cavity in which the first set of array electronics is disposed and a second cavity in which the second set of array electronics is disposed, wherein the first vertical stiffener is configured to be embedded within the first set of array electronics and the second set of array electronics, wherein the first vertical stiffener comprises a first integrated cooling manifold configured to cool both the first set of array electronics and the second set of array electronics.
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