公开(公告)号：US10217727B2

公开(公告)日：2019-02-26

申请号：US15501750

申请日：2014-08-25

Applicant: Renesas Electronics Corporation

Inventor： Akira Muto ,  Norio Kido

IPC: H01L25/07 ,  H01L23/28 ,  H01L25/18 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H02P27/06 ,  H02P25/092

Abstract: For example, a semiconductor device capable of achieving a high performance applicable to an SR motor is provided. The semiconductor device includes a chip mounting portion TAB1 on which a semiconductor chip CHP1 having an IGBT is mounted, and a chip mounting portion TAB2 on which a semiconductor chip CHP2 having a diode is formed. The semiconductor device also includes a lead LD1A electrically connected to an emitter electrode pad EP of the semiconductor chip CHP1 via a clip CLP1, and a lead LD1B electrically connected to an anode electrode pad ADP of the semiconductor chip CHP2 via a clip CLP2. At this time, the chip mounting portion TAB1 is separated electrically from the chip mounting portion TAB2, and the clip CLP1 is separated electrically from the clip CLP2.

公开(公告)号：US11029740B2

公开(公告)日：2021-06-08

申请号：US16189089

申请日：2018-11-13

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shunichi Kaeriyama ,  Norio Kido

IPC: G06F1/28 ,  H02P29/68 ,  G01K1/08 ,  H02M1/32 ,  H03K17/082 ,  G01K7/01 ,  H03K17/08

Abstract: There is to provide a power conversion device capable of estimating a junction temperature of a power transistor at a high accuracy. The control device includes a temperature estimation unit and controls the on and off of the power transistor through a driver. The voltage detection circuit detects the inter-terminal voltage of a source and drain terminals during the on-period of the power transistor. The temperature estimation unit previously holds the correlation information between the inter-terminal voltage and inter-terminal current of the source and drain terminals and the junction temperature, and estimates the junction temperature, based on the inter-terminal voltage detected by the voltage detection circuit, the known inter-terminal current, and the correlation information.

公开(公告)号：US10546839B2

公开(公告)日：2020-01-28

申请号：US16146097

申请日：2018-09-28

Applicant: Renesas Electronics Corporation

Inventor： Akira Muto ,  Norio Kido

IPC: H01L25/07 ,  H01L23/28 ,  H01L25/18 ,  H01L23/00 ,  H02P25/092 ,  H01L23/31 ,  H01L23/498 ,  H02P27/06

Abstract: An electronic apparatus includes a wiring board including a main surface on which a first wiring and a second wiring are formed, a first semiconductor device mounted on the main surface of the wiring board, and a second semiconductor device mounted on the main surface of the wiring board. Each of the first semiconductor device and the second semiconductor device includes a first semiconductor chip including an insulated gate bipolar transistor, a second semiconductor chip including a diode, a first lead electrically connected to an emitter electrode pad formed on a first front surface of the first semiconductor chip, a second lead electrically connected to an anode electrode pad formed on a second front surface of the second semiconductor chip, and a first terminal electrically connected to a collector electrode formed on a first back surface of the first semiconductor chip.

公开(公告)号：US20190088629A1

公开(公告)日：2019-03-21

申请号：US16146097

申请日：2018-09-28

Applicant: Renesas electronics Corporation

Inventor： Akira Muto ,  Norio Kido

IPC: H01L25/07 ,  H01L23/498 ,  H01L25/18 ,  H01L23/00 ,  H02P25/092 ,  H01L23/28 ,  H01L23/31 ,  H02P27/06

Abstract: An electronic apparatus includes a wiring board including a main surface on which a first wiring and a second wiring are formed, a first semiconductor device mounted on the main surface of the wiring board, and a second semiconductor device mounted on the main surface of the wiring board. Each of the first semiconductor device and the second semiconductor device includes a first semiconductor chip including an insulated gate bipolar transistor, a second semiconductor chip including a diode, a first lead electrically connected to an emitter electrode pad formed on a first front surface of the first semiconductor chip, a second lead electrically connected to an anode electrode pad formed on a second front surface of the second semiconductor chip, and a first terminal electrically connected to a collector electrode formed on a first back surface of the first semiconductor chip.