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    Semiconductor device
    1.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10198301B2

    公开(公告)日：2019-02-05

    申请号：US16100260

    申请日：2018-08-10

    Applicant: Renesas Electronics Corporation

    Inventor： Tetsuji Tsuda ,  Masaru Hase ,  Yuki Inoue ,  Naohiro Nishikawa

    IPC: G06F3/06 ,  G06F9/52 ,  G06F9/48

    Abstract: A semiconductor device includes a central processing unit and a processor on one semiconductor substrate. The processor includes a buffer for storing a first register setting list and notifies the central processing unit of an access complete signal indicating completion of reading a second register setting list within a memory. The central processing unit changes the second register setting list within the memory based on the access complete signal and notifies the processor of an update request signal. The processor reads the second register setting list changed by the central processing unit into the buffer to update the first register setting list based on the update request information.

    Semiconductor device, allocation method, and display system
    4.
    发明授权
    Semiconductor device, allocation method, and display system 有权

    公开(公告)号：US10461956B2

    公开(公告)日：2019-10-29

    申请号：US15631284

    申请日：2017-06-23

    Applicant: Renesas Electronics Corporation

    Inventor： Tetsuji Tsuda ,  Masaru Hase ,  Yuki Inoue ,  Katsushige Matsubara

    IPC: H04L12/28 ,  G06F11/30 ,  G11C5/04 ,  G11C29/02

    Abstract: A semiconductor device includes a plurality of IP cores, a plurality of storage devices, a configuration information acquiring unit that acquires configuration information for specifying a timing when the IP core accesses the storage device, and an allocation determining unit that determines the storage device allocated to the IP core. The configuration information acquiring unit acquires configuration information regarding a first IP core and configuration information regarding a second IP core. The allocation determining unit determines, based on the configuration information, whether an access timing by the first IP core is the same as an access timing by the second IP core, and when it is determined that the access timings are the same, determines allocation in such a way that the storage device allocated to the first IP core becomes different from the storage device allocated to the second IP core.

    Semiconductor device
    5.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10067806B2

    公开(公告)日：2018-09-04

    申请号：US15173634

    申请日：2016-06-04

    Applicant: Renesas Electronics Corporation

    Inventor： Tetsuji Tsuda ,  Masaru Hase ,  Yuki Inoue ,  Naohiro Nishikawa

    IPC: G06F3/06 ,  G06F9/52 ,  G06F9/48

    Abstract: A semiconductor device includes a central processing unit and a processor on one semiconductor substrate. The processor includes a buffer for storing a register setting list and notifies the central processing unit of an access complete signal indicating completion of reading the register setting list. The central processing unit changes the register setting list within a memory based on the access complete signal and notifies the processor of an update request signal. The processor reads the register setting list changed by the central processing unit into the buffer based on the update request information.

    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20170046069A1

    公开(公告)日：2017-02-16

    申请号：US15173634

    申请日：2016-06-04

    Applicant: Renesas Electronics Corporation

    Inventor： Tetsuji TSUDA ,  Masaru Hase ,  Yuki Inoue ,  Naohiro Nishikawa

    IPC: G06F3/06

    CPC classification number: G06F9/52 ,  G06F9/4812

    Abstract: A semiconductor device includes a central processing unit and a processor on one semiconductor substrate. The processor includes a buffer for storing a register setting list and notifies the central processing unit of an access complete signal indicating completion of reading the register setting list. The central processing unit changes the register setting list within a memory based on the access complete signal and notifies the processor of an update request signal. The processor reads the register setting list changed by the central processing unit into the buffer based on the update request information.

    Abstract translation: 半导体器件包括在一个半导体衬底上的中央处理单元和处理器。 处理器包括用于存储寄存器设置列表的缓冲器，并向中央处理单元通知指示完成读取寄存器设置列表的访问完成信号。 中央处理单元基于访问完成信号改变存储器内的寄存器设置列表，并向处理器通知更新请求信号。 处理器基于更新请求信息读取由中央处理单元改变为缓冲器的寄存器设置列表。

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