公开(公告)号：US20240162137A1

公开(公告)日：2024-05-16

申请号：US18510635

申请日：2023-11-15

Applicant: Renesas Electronics Corporation

Inventor： Yuki SUGIYAMA ,  Eiji HIRAIWA ,  Akira MITSUIKI

IPC: H01L23/522

CPC classification number: H01L23/5223 ,  H01L28/60

Abstract: A manufacturing method of a semiconductor device includes: depositing a first conductor film, a dielectric film, and a second conductor film in this order in a MIM region and a wiring region; selectively removing the second conductor film, thereby forming an upper electrode of a capacitor element from the second conductor film; selectively removing the exposed dielectric film, thereby exposing the first conductor film in the wiring region and forming a dielectric layer having a flange portion remaining so as to protrude outward from a region under the upper electrode in the MIM region; and selectively removing the first conductor film, thereby forming a lower electrode of the capacitor element from the first conductor film and forming a wiring pattern from the first conductor film of which the upper surface is exposed in the wiring region.