Timing loop and method filter for a digital communications system
    2.
    发明授权
    Timing loop and method filter for a digital communications system 有权
    数字通信系统的定时循环和方法滤波器

    公开(公告)号:US06975676B1

    公开(公告)日:2005-12-13

    申请号:US09670047

    申请日:2000-09-25

    IPC分类号: H04B1/10 H04L7/02

    CPC分类号: H04L7/0054 H04L7/0025

    摘要: A timing loop is used in a data communications receiver to time lock the receiver to a transmitter sending data across a communications loop, where the receiver includes a linear equalizer for correcting signal distortion associated with the communications loop. The timing loop includes a timing equalizer filter functionally positioned to provide an equalized signal to the phase detector portion of the timing loop. After the linear equalizer trains, the equalizer coefficients are copied to the timing equalizer.

    摘要翻译: 在数据通信接收机中使用定时环来将接收机时间锁定到通过通信环路发送数据的发射机,其中接收机包括用于校正与通信环路相关联的信号失真的线性均衡器。 定时环包括定时均衡器滤波器,其功能地定位成向定时环路的相位检测器部分提供均衡的信号。 在线性均衡器列之后,均衡器系数被复制到定时均衡器。