公开(公告)号：US07470594B1

公开(公告)日：2008-12-30

申请号：US11302920

申请日：2005-12-14

申请人： Richard W. Foote, Jr. ,  William Max Coppock ,  Darren Lee Rust ,  Charles A. Dark

发明人： Richard W. Foote, Jr. ,  William Max Coppock ,  Darren Lee Rust ,  Charles A. Dark

IPC分类号： H01L21/331 ,  H01L21/8222

CPC分类号： H01L21/31662 ,  H01L21/02238 ,  H01L21/02255 ,  H01L29/0804 ,  Y10S438/905

摘要： A method is disclosed for controlling the formation of an interfacial oxide layer in a polysilicon emitter transistor device. The interfacial oxide layer is formed between an underlying substrate of single crystal silicon and an upper layer of polysilicon. The current gain and the emitter resistance of the transistor device are related to the thickness of the interfacial oxide layer. The oxide of the interfacial oxide layer is grown in a low pressure, low temperature pure oxygen (O2) environment that greatly reduces the oxidation rate. The low oxidation rate allows the thickness of the interfacial oxide layer to be precisely controlled and sources of variation to be minimized in the manufacturing process.

摘要翻译： 公开了一种用于控制多晶硅发射极晶体管器件中的界面氧化物层的形成的方法。 界面氧化物层形成在单晶硅的下面的衬底和多晶硅的上层之间。 晶体管器件的电流增益和发射极电阻与界面氧化物层的厚度有关。 界面氧化物层的氧化物在低压，低温纯氧（O 2）环境中生长，大大降低了氧化速率。 低氧化速率允许在制造过程中精细控制界面氧化物层的厚度和变化的来源。

公开(公告)号：US07332403B1

公开(公告)日：2008-02-19

申请号：US11179022

申请日：2005-07-11

申请人： Rodney Hill ,  Victor Torres ,  William Max Coppock ,  Richard W. Foote, Jr. ,  Terry L. Lines ,  Tom Bold

发明人： Rodney Hill ,  Victor Torres ,  William Max Coppock ,  Richard W. Foote, Jr. ,  Terry L. Lines ,  Tom Bold

IPC分类号： H01L21/20

CPC分类号： H01L28/20

摘要： A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. A layer of dielectric material is formed over the resistor protect layer. The dielectric material is masked and dry etched to leave a first portion of dielectric material over a first end of the thin film resistor and a second portion of dielectric material over a second end of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the dielectric material as a hard mask. Then a second dielectric layer is deposited and vias are etched down to the underlying portions of the resistor protect layer.

摘要翻译： 公开了一种具有由介电掩模限定的端盖的掩埋薄膜电阻器。 在集成电路基板上形成薄膜电阻。 在薄膜电阻上形成电阻保护层。 电介质材料层形成在电阻器保护层上。 电介质材料被掩蔽和干蚀刻以在薄膜电阻器的第一端上方留下电介质材料的第一部分，并且在薄膜电阻器的第二端上延伸第二部分电介质材料。 然后使用电介质材料的第一和第二部分作为硬掩模来湿式蚀刻电阻器保护层。 然后沉积第二电介质层，并将通孔蚀刻到电阻器保护层的下面部分。

公开(公告)号：US07808048B1

公开(公告)日：2010-10-05

申请号：US11974647

申请日：2007-10-15

申请人： Rodney Hill ,  Victor Torres ,  William Max Coppock ,  Richard W. Foote, Jr. ,  Terry L. Lines ,  Tom Bold

发明人： Rodney Hill ,  Victor Torres ,  William Max Coppock ,  Richard W. Foote, Jr. ,  Terry L. Lines ,  Tom Bold

IPC分类号： H01L23/62

CPC分类号： H01L28/20

摘要： A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. A layer of dielectric material is formed over the resistor protect layer. The dielectric material is masked and dry etched to leave a first portion of dielectric material over a first end of the thin film resistor and a second portion of dielectric material over a second end of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the dielectric material as a hard mask. Then a second dielectric layer is deposited and vias are etched down to the underlying portions of the resistor protect layer.

摘要翻译： 公开了一种具有由介电掩模限定的端盖的掩埋薄膜电阻器。 在集成电路基板上形成薄膜电阻。 在薄膜电阻上形成电阻保护层。 电介质材料层形成在电阻器保护层上。 电介质材料被掩蔽和干蚀刻以在薄膜电阻器的第一端上方留下电介质材料的第一部分，并且在薄膜电阻器的第二端上延伸第二部分电介质材料。 然后使用电介质材料的第一和第二部分作为硬掩模来湿式蚀刻电阻器保护层。 然后沉积第二介电层，并将通孔蚀刻到电阻器保护层的下面部分。