公开(公告)号：US5111413A

公开(公告)日：1992-05-05

申请号：US328427

申请日：1989-03-24

申请人： Richard W. Lazansky ,  Thomas R. Miller ,  David R. Coelho ,  Kenneth E. Scott ,  Alec G. Stanculescu

发明人： Richard W. Lazansky ,  Thomas R. Miller ,  David R. Coelho ,  Kenneth E. Scott ,  Alec G. Stanculescu

IPC分类号： G06F11/25 ,  G06F17/50

CPC分类号： G06F17/5022

摘要： A simulation system for circuit design is disclosed. The system couples a schematic editor and simulator to allow incremental changes to a design under test without requiring prior shutdown of the simulator. The system uses a method which permits a wide range of changes to the design and provides a resulting netlist for the changed design. Changes can be made to the schematic which include changes in hierarchy, addition or deletion of components (including hierarchical components), addition or deletion of signals at any level within the design hierarchy, addition or deletion of interconnections of components at any level of hierarchy within the design, addition and deletion of interface ports for any component type, substitution of a new component for an existing one (including swapping hierarchical and behavioral descriptions), and alteration of parametric data such as device delay timing. The simulation continues to run after design changes are made. The method may be used in conjunction with hardware modeling systems.

摘要翻译： 公开了一种用于电路设计的仿真系统。 该系统将一个原理图编辑器和模拟器耦合到允许对被测设计进行增量更改，而无需先前关闭模拟器。 该系统使用一种允许对设计进行大范围更改的方法，并为更改后的设计提供最终的网表。 可以对原理图进行更改，包括层次结构的更改，组件的添加或删除（包括分层组件），设计层级内任何级别的信号的添加或删除，添加或删除任何层级结构内的组件互连 任何组件类型的接口端口的设计，添加和删除，对现有组件的新组件的替换（包括交换层次结构和行为描述）以及参数数据的更改，如设备延迟时序。 在进行设计更改后，仿真继续运行。 该方法可以与硬件建模系统结合使用。