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公开(公告)号：US07227549B2
公开(公告)日：2007-06-05
申请号：US10768567
申请日：2004-01-29
CPC分类号： G01R13/0236 , G01R1/025 , G06F3/0481 , G06F2203/04806
摘要： A method of indicating and manipulating a zoom region of a waveform being displayed includes a zoom region indicator. The zoom region indicator has an associated marker that spans the zoom region but is never less than a minimum span to allow ease of identifying or locating the zoom region on the displayed waveform. Manipulating the associated marker with a pointer device causes the zoom region to move accordingly along the displayed waveform. The portion of the displayed waveform that is within the zoom region is displayed as a zoomed waveform on the display.
摘要翻译： 指示和操纵正被显示的波形的变焦区域的方法包括缩放区域指示符。 变焦区域指示器具有跨越变焦区域的相关联的标记，但是不得小于最小跨度，以便易于识别或定位显示的波形上的变焦区域。 用指针装置操作相关联的标记使得缩放区域沿着显示的波形相应地移动。 在缩放区域内显示的波形的部分在显示屏上显示为缩放波形。
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2.发明授权Method of processing waveform data from one or more channels using a test and measurement instrument 有权使用测试和测量仪器处理来自一个或多个通道的波形数据的方法公开(公告)号：US08055464B2
公开(公告)日：2011-11-08
申请号：US12206072
申请日：2008-09-08
IPC分类号： G01R13/22
CPC分类号： G01R13/0254 , G01R13/029
摘要： The method of processing waveform data from one or more channels using a test and measurement instrument, such as an oscilloscope, is described in which waveform data is collected from a DUT; defining a context is defined by instructing the instrument to obtain the focus of each waveform datum having a first user-defined attribute; defining a selection criteria by instructing the instrument to obtain the focus of each waveform datum having both a first user-defined attribute and a second user-defined attribute; and defining an action by instructing the instrument to perform an operation responsive to finding at least one waveform datum having both the first user-defined attribute and the second user-defined attribute.
摘要翻译： 描述了使用诸如示波器的测试和测量仪器从一个或多个通道处理波形数据的方法，其中从DUT收集波形数据; 通过指示仪器获得具有第一用户定义属性的每个波形数据的焦点来定义上下文; 通过指示仪器获得具有第一用户定义属性和第二用户定义属性的每个波形数据的焦点来定义选择标准; 以及通过指示所述仪器执行响应于找到具有所述第一用户定义属性和所述第二用户定义属性的至少一个波形数据的操作来定义动作。
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公开(公告)号：US20080263253A1
公开(公告)日：2008-10-23
申请号：US12108344
申请日：2008-04-23
申请人： Mehrab S. Sedeh , Robert D. Twete
发明人： Mehrab S. Sedeh , Robert D. Twete
IPC分类号： G06F13/28
CPC分类号： G06F13/4027 , G06F15/8007
摘要： The apparatus for a test and measurement instrument consists of multiple integrated circuits with each integrated circuit being connected to its own memory controller. At least one of the integrated circuits is a specialized integrated circuit, which may be a graphics processing unit, a digital signal processor, or a field-programmable gate array. Each memory controller is connected to its own memory. The integrated circuits are connected in a circular arrangement by multiple high-speed interconnects. A bridge is connected to at least the first and last integrated circuits. A system bus connects the bridge to an acquisition module. The acquisition module has a signal bus interface with the system bus being connected to the acquisition module and having its own acquisition hardware. The acquisition hardware is a direct memory access machine that can transfer data to any portion of the memory. There is a signal source connected to the signal bus interface.
摘要翻译： 用于测试和测量仪器的设备由多个集成电路组成，每个集成电路连接到其自己的存储器控制器。 集成电路中的至少一个是专用集成电路，其可以是图形处理单元，数字信号处理器或现场可编程门阵列。 每个存储器控制器连接到其自己的存储器。 集成电路通过多个高速互连以圆形布置连接。 桥连接至少至少第一和最后一个集成电路。 系统总线将桥接器连接到采集模块。 采集模块具有信号总线接口，系统总线连接到采集模块并具有其自己的采集硬件。 采集硬件是可以将数据传输到存储器的任何部分的直接存储器存取机器。 有一个信号源连接到信号总线接口。
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公开(公告)号：US07734442B2
公开(公告)日：2010-06-08
申请号：US12108344
申请日：2008-04-23
申请人： Mehrab S. Sedeh , Robert D. Twete
发明人： Mehrab S. Sedeh , Robert D. Twete
IPC分类号： G01R27/28
CPC分类号： G06F13/4027 , G06F15/8007
摘要： The apparatus for a test and measurement instrument consists of multiple integrated circuits with each integrated circuit being connected to its own memory controller. At least one of the integrated circuits is a specialized integrated circuit, which may be a graphics processing unit, a digital signal processor, or a field-programmable gate array. Each memory controller is connected to its own memory. The integrated circuits are connected in a circular arrangement by multiple high-speed interconnects. A bridge is connected to at least the first and last integrated circuits. A system bus connects the bridge to an acquisition module. The acquisition module has a signal bus interface with the system bus being connected to the acquisition module and having its own acquisition hardware. The acquisition hardware is a direct memory access machine that can transfer data to any portion of the memory. There is a signal source connected to the signal bus interface.
摘要翻译： 用于测试和测量仪器的设备由多个集成电路组成，每个集成电路连接到其自己的存储器控制器。 集成电路中的至少一个是专用集成电路，其可以是图形处理单元，数字信号处理器或现场可编程门阵列。 每个存储器控制器连接到其自己的存储器。 集成电路通过多个高速互连以圆形布置连接。 桥连接至少至少第一和最后一个集成电路。 系统总线将桥接器连接到采集模块。 采集模块具有信号总线接口，系统总线连接到采集模块并具有其自己的采集硬件。 采集硬件是可以将数据传输到存储器的任何部分的直接存储器存取机器。 有一个信号源连接到信号总线接口。
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