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1.发明申请System and Method for Implementing a Programmable DMA Master With Date Checking Utilizing a Drone System Controller 失效使用无人机系统控制器实现可编程DMA主机的日期检查的系统和方法公开(公告)号：US20080059103A1
公开(公告)日：2008-03-06
申请号：US11470282
申请日：2006-09-06
申请人： Robert W. Berry , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
发明人： Robert W. Berry , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
摘要： A method, system, and computer-usable medium for implementing a programmable DMA master with date checking utilizing a drone system controller. According to a preferred embodiment of the present invention, a drone processor generates a collection of random data and stores a first and second copy of the collection of random data in a first and second memory location in a drone memory. The drone processor writes a third copy of the collection of random data in a processor memory. When the drone processor retrieves the third copy from the processor memory, the drone processor writes the third copy in the second memory location in the drone memory. When the drone processor compares the first copy with the third copy, the results of the compare is written in a status location within the drone processor.
摘要翻译： 一种方法，系统和计算机可用介质，用于使用无人机系统控制器实现具有日期检查的可编程DMA主机。 根据本发明的优选实施例，无人机处理器生成随机数据的集合，并将随机数据集合的第一和第二副本存储在无人机存储器中的第一和第二存储器位置中。 无人机处理器将随机数据集合的第三副本写入处理器存储器。 当无人机处理器从处理器存储器检索第三副本时，无人机处理器将第三副本写入无人机存储器中的第二存储器位置。 当无人机处理器将第一副本与第三副本进行比较时，将比较结果写入无人机处理器内的状态位置。
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2.发明申请SYSTEM AND METHOD FOR IMPLEMENTING A PROGRAMMABLE DMA MASTER WITH DATE CHECKING UTILIZING A DRONE SYSTEM CONTROLLER 失效用于执行可编程DMA主机的系统和方法，日期检查使用DRONE系统控制器公开(公告)号：US20080312863A1
公开(公告)日：2008-12-18
申请号：US12187199
申请日：2008-08-06
申请人： Robert W. Berry, JR. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
发明人： Robert W. Berry, JR. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
摘要： A method, system, and computer-usable medium for implementing a programmable DMA master with data checking utilizing a drone system controller. According to an embodiment of the present invention, a drone processor generates a collection of random data and stores a first and second copy of the collection of random data in a first and second memory location in a drone memory. The drone processor writes a third copy of the collection of random data in a processor memory. When the drone processor retrieves the third copy from the processor memory, the drone processor writes the third copy in the second memory location in the drone memory. When the drone processor compares the first copy with the third copy, the results of the compare is written in a status location within the drone processor.
摘要翻译： 一种用于使用无人机系统控制器实现具有数据检查的可编程DMA主机的方法，系统和计算机可用介质。 根据本发明的实施例，无人机处理器生成随机数据的集合，并将随机数据的集合的第一和第二副本存储在无人机存储器中的第一和第二存储器位置中。 无人机处理器将随机数据集合的第三副本写入处理器存储器。 当无人机处理器从处理器存储器检索第三副本时，无人机处理器将第三副本写入无人机存储器中的第二存储器位置。 当无人机处理器将第一副本与第三副本进行比较时，将比较结果写入无人机处理器内的状态位置。
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3.发明授权Implementing a programmable DMA master with write inconsistency determination 失效实现具有写入不一致性确定的可编程DMA主机公开(公告)号：US08165847B2
公开(公告)日：2012-04-24
申请号：US12187199
申请日：2008-08-06
申请人： Robert W. Berry, Jr. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
发明人： Robert W. Berry, Jr. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
摘要： A method, system, and computer-usable medium for implementing a programmable DMA master with data checking utilizing a drone system controller. According to an embodiment of the present invention, a drone processor generates a collection of random data and stores a first and second copy of the collection of random data in a first and second memory location in a drone memory. The drone processor writes a third copy of the collection of random data in a processor memory. When the drone processor retrieves the third copy from the processor memory, the drone processor writes the third copy in the second memory location in the drone memory. When the drone processor compares the first copy with the third copy, the results of the compare is written in a status location within the drone processor.
摘要翻译： 一种用于使用无人机系统控制器实现具有数据检查的可编程DMA主机的方法，系统和计算机可用介质。 根据本发明的实施例，无人机处理器生成随机数据的集合，并将随机数据的集合的第一和第二副本存储在无人机存储器中的第一和第二存储器位置中。 无人机处理器将随机数据集合的第三副本写入处理器存储器。 当无人机处理器从处理器存储器检索第三副本时，无人机处理器将第三副本写入无人机存储器中的第二存储器位置。 当无人机处理器将第一副本与第三副本进行比较时，将比较结果写入无人机处理器内的状态位置。
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4.发明授权System and method for implementing a programmable DMA master with data checking utilizing a drone system controller 失效使用无人机系统控制器实现具有数据检查的可编程DMA主机的系统和方法公开(公告)号：US07430487B2
公开(公告)日：2008-09-30
申请号：US11470282
申请日：2006-09-06
申请人： Robert W. Berry, Jr. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
发明人： Robert W. Berry, Jr. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
摘要： A method, system, and computer-usable medium for implementing a programmable DMA master with data checking utilizing a drone system controller. According to an embodiment of the present invention, a drone processor generates a collection of random data and stores a first and second copy of the collection of random data in a first and second memory location in a drone memory. The drone processor writes a third copy of the collection of random data in a processor memory. When the drone processor retrieves the third copy from the processor memory, the drone processor writes the third copy in the second memory location in the drone memory. When the drone processor compares the first copy with the third copy, the results of the compare is written in a status location within the drone processor.
摘要翻译： 一种用于使用无人机系统控制器实现具有数据检查的可编程DMA主机的方法，系统和计算机可用介质。 根据本发明的实施例，无人机处理器生成随机数据的集合，并将随机数据的集合的第一和第二副本存储在无人机存储器中的第一和第二存储器位置中。 无人机处理器将随机数据集合的第三副本写入处理器存储器。 当无人机处理器从处理器存储器检索第三副本时，无人机处理器将第三副本写入无人机存储器中的第二存储器位置。 当无人机处理器将第一副本与第三副本进行比较时，将比较结果写入无人机处理器内的状态位置。
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5.发明申请STIMULATING AND RECEIVING TEST/DEBUG DATA FROM A SYSTEM UNDER TEST VIA A DRONE CARD PCI BUS 审中-公开通过DRC卡PCI总线测试和接收来自系统的测试/调试数据公开(公告)号：US20080126632A1
公开(公告)日：2008-05-29
申请号：US11470507
申请日：2006-09-06
IPC分类号： G06F13/00
CPC分类号： G06F11/3648
摘要： A computer-implementable method, system and computer-usable medium for aiding in debugging operations of a System Under Test (SUT) through the use of an external DRONE card is presented. System test software that is running on the SUT “sets aside” debug/status information in a reserved/dedicated Peripheral Component Interface (PCI) section of system memory in the SUT. This information is communicated between the SUT and a DRONE card via a PCI bus. Debug/status information is thus accessed and manipulated by the DRONE card without disturbing (interrupting) normal operations of the SUT.
摘要翻译： 介绍了一种用于通过使用外部DRONE卡来帮助被测系统（SUT）进行调试操作的计算机可实现的方法，系统和计算机可用介质。 在SUT上运行的系统测试软件在“SUT”的系统内存的保留/专用外设组件接口（PCI）部分中“预留”调试/状态信息。 该信息通过PCI总线在SUT和DRONE卡之间通信。 调试/状态信息由DRONE卡访问和操作，而不会干扰（中断）SUT的正常操作。
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公开(公告)号：US07689865B2
公开(公告)日：2010-03-30
申请号：US11470478
申请日：2006-09-06
IPC分类号： G06F11/00
CPC分类号： G06F11/2236 , G01R31/318555 , G01R31/318558 , G01R31/318572
摘要： A method, device, system, and computer program product for enabling advanced control of debugging processes on a JTAG (Joint Test Action Group) IEEE 1149.1 capable device (or system under test (SUT)). Middlesoft Commander is provided within a JTAG-enabled (or JTAG) POD, which is connected to both a host system executing debugging software and the SUT. The communication between the POD and the SUT is enabled with a pair of JTAG interfaces bridging the connection between the POD and the SUT. Middlesoft Commander comprises code that enables Middlesoft Commander to convert high level commands (debug packets) received from (or generated by) the host system into JTAG commands. These JTAG commands are forwarded to the SUT. Middlesoft Commander further comprises code that enables Middlesoft Commander to convert the JTAG data received from the SUT into commands recognizable by the host system.
摘要翻译： 一种方法，设备，系统和计算机程序产品，用于实现对JTAG（联合测试动作组）IEEE 1149.1能力设备（或被测系统（SUT））的调试过程的高级控制。 Middlesoft Commander在一个JTAG（或JTAG）POD中提供，它连接到执行调试软件的主机系统和SUT。 POD和SUT之间的通信可以通过桥接POD和SUT之间的连接的一对JTAG接口来实现。 Middlesoft Commander包括代码，使Middlesoft Commander能够将从主机系统（或由主机系统）生成的高级命令（调试数据包）转换为JTAG命令。 这些JTAG命令被转发到SUT。 Middlesoft Commander还包括使Middlesoft Commander将从SUT接收到的JTAG数据转换为主机系统可识别的命令的代码。
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公开(公告)号：US20080126895A1
公开(公告)日：2008-05-29
申请号：US11470478
申请日：2006-09-06
IPC分类号： G01R31/3177 , G06F11/25
CPC分类号： G06F11/2236 , G01R31/318555 , G01R31/318558 , G01R31/318572
摘要： A method, device, system, and computer program product for enabling advanced control of debugging processes on a JTAG (Joint Test Action Group) IEEE 1149.1 capable device (or system under test (SUT)). Middlesoft Commander is provided within a JTAG-enabled (or JTAG) POD, which is connected to both a host system executing debugging software and the SUT. The communication between the POD and the SUT is enabled with a pair of JTAG interfaces bridging the connection between the POD and the SUT. Middlesoft Commander comprises code that enables Middlesoft Commander to convert high level commands (debug packets) received from (or generated by) the host system into JTAG commands. These JTAG commands are forwarded to the SUT. Middlesoft Commander further comprises code that enables Middlesoft Commander to convert the JTAG data received from the SUT into commands recognizable by the host system.
摘要翻译： 一种方法，设备，系统和计算机程序产品，用于实现对JTAG（联合测试动作组）IEEE 1149.1能力设备（或被测系统（SUT））的调试过程的高级控制。 Middlesoft Commander在一个JTAG（或JTAG）POD中提供，它连接到执行调试软件的主机系统和SUT。 POD和SUT之间的通信可以通过桥接POD和SUT之间的连接的一对JTAG接口来实现。 Middlesoft Commander包括代码，使Middlesoft Commander能够将从主机系统（或由主机系统）生成的高级命令（调试数据包）转换为JTAG命令。 这些JTAG命令被转发到SUT。 Middlesoft Commander还包括使Middlesoft Commander将从SUT接收到的JTAG数据转换为主机系统可识别的命令的代码。
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