公开(公告)号：US20110068867A1

公开(公告)日：2011-03-24

申请号：US12857163

申请日：2010-08-16

申请人： Robert W. Moses ,  Leslie B. Tyler ,  Christoper Hanna

发明人： Robert W. Moses ,  Leslie B. Tyler ,  Christoper Hanna

IPC分类号： H03G3/20

CPC分类号： H03G1/0088 ,  H03G3/001

摘要： A digitally-controlled analog gain circuit supports a plurality of gain settings in which gain changes are made from a first setting to a new setting in response to a clocking signal. Large changes in gain are interpolated in small gain steps or increments. The clocking signal can be generated by an oscillator, or as a sequence of pulses output by a zero crossing detector. The gain circuit can apply positive gain to the signal. Alternatively, the gain circuit can apply a negative gain (attenuation) to the signal. The clocking signal can be provided in a pseudo-randomized manner to minimize unwanted signal effects such as discernable sound transients.

摘要翻译： 数字控制的模拟增益电路支持多个增益设置，其中响应于时钟信号，增益从第一设置改变到新的设置。 以小的增益步长或增量内插增益的大的变化。 时钟信号可以由振荡器产生，或者作为由过零检测器输出的脉冲序列。 增益电路可以对信号施加正增益。 或者，增益电路可以对信号施加负增益（衰减）。 可以以伪随机方式提供时钟信号以最小化不期望的信号效应，例如可识别的声音瞬态。