公开(公告)号：US20080204287A1

公开(公告)日：2008-08-28

申请号：US12022065

申请日：2008-01-29

申请人： Rohit Puri ,  Partha Sriram

发明人： Rohit Puri ,  Partha Sriram

IPC分类号： H03M7/40

CPC分类号： H03M7/425 ,  H03M7/40

摘要： Systems and methods for optimizing system performance in variable length decoding systems are described. Embodiments are described in which decode tables are analyzed and elements of the tables sorted by probability of occurrence. Storage of elements can be determined by probability of occurrence and embodiments of the present invention can optimize system efficiency by storing most likely entries into fast-memory and least likely entries in slowest memory. In certain embodiments, a single large table is provided that cannot fit into decoder fast-memory. In some embodiments, individual elements can be optimized for storage in fast-memory by selecting more frequently occurring entries or groups of entries into decoder memory.

摘要翻译： 描述了可变长度解码系统中优化系统性能的系统和方法。 对实施例进行说明，其中解析表被分析，并且按照发生概率对表中的元素进行排序。 可以通过发生概率来确定元素的存储，并且本发明的实施例可以通过将最可能的条目存储在最慢的存储器中的快速存储器和最不可能的条目中来优化系统效率。 在某些实施例中，提供了不能适应解码器快速存储器的单个大表。 在一些实施例中，通过选择更频繁出现的条目或条目组到解码器存储器中，各个元件可以被优化用于存储在快速存储器中。

公开(公告)号：US20070268166A1

公开(公告)日：2007-11-22

申请号：US11437206

申请日：2006-05-19

申请人： Rohit Puri ,  Partha Sriram

发明人： Rohit Puri ,  Partha Sriram

IPC分类号： H03M7/00

CPC分类号： H03M7/425 ,  H03M7/40

摘要： Systems and methods for optimizing system performance in variable length decoding systems are described. Embodiments are described in which decode tables are analyzed and elements of the tables sorted by probability of occurrence. Storage of elements can be determined by probability of occurrence and embodiments of the present invention can optimize system efficiency by storing most likely entries into fast-memory and least likely entries in slowest memory. In certain embodiments, a single large table is provided that cannot fit into decoder fast-memory. In some embodiments, individual elements can be optimized for storage in fast-memory by selecting more frequently occurring entries or groups of entries into decoder memory.

摘要翻译： 描述了可变长度解码系统中优化系统性能的系统和方法。 对实施例进行说明，其中解析表被分析，并且按照发生概率对表中的元素进行排序。 可以通过发生概率来确定元素的存储，并且本发明的实施例可以通过将最可能的条目存储在最慢的存储器中的快速存储器和最不可能的条目中来优化系统效率。 在某些实施例中，提供了不能适应解码器快速存储器的单个大表。 在一些实施例中，通过选择更频繁出现的条目或条目组到解码器存储器中，各个元件可以被优化用于存储在快速存储器中。

公开(公告)号：US07605725B2

公开(公告)日：2009-10-20

申请号：US12022065

申请日：2008-01-29

申请人： Rohit Puri ,  Partha Sriram

发明人： Rohit Puri ,  Partha Sriram

IPC分类号： H03M7/40

CPC分类号： H03M7/425 ,  H03M7/40

摘要： Systems and methods for optimizing system performance in variable length decoding systems are described. Embodiments are described in which decode tables are analyzed and elements of the tables sorted by probability of occurrence. Storage of elements can be determined by probability of occurrence and embodiments of the present invention can optimize system efficiency by storing most likely entries into fast-memory and least likely entries in slowest memory. In certain embodiments, a single large table is provided that cannot fit into decoder fast-memory. In some embodiments, individual elements can be optimized for storage in fast-memory by selecting more frequently occurring entries or groups of entries into decoder memory.

摘要翻译： 描述了可变长度解码系统中优化系统性能的系统和方法。 对实施例进行说明，其中解析表被分析，并且按照发生概率对表中的元素进行排序。 可以通过发生概率来确定元素的存储，并且本发明的实施例可以通过将最可能的条目存储在最慢的存储器中的快速存储器和最不可能的条目中来优化系统效率。 在某些实施例中，提供了不能适应解码器快速存储器的单个大表。 在一些实施例中，通过选择更频繁出现的条目或条目组到解码器存储器中，各个元件可以被优化用于存储在快速存储器中。

公开(公告)号：US07324026B2

公开(公告)日：2008-01-29

申请号：US11437206

申请日：2006-05-19

申请人： Rohit Puri ,  Partha Sriram

发明人： Rohit Puri ,  Partha Sriram

IPC分类号： H03M7/40

CPC分类号： H03M7/425 ,  H03M7/40

摘要： Systems and methods for optimizing system performance in variable length decoding systems are described. Embodiments are described in which decode tables are analyzed and elements of the tables sorted by probability of occurrence. Storage of elements can be determined by probability of occurrence and embodiments of the present invention can optimize system efficiency by storing most likely entries into fast-memory and least likely entries in slowest memory. In certain embodiments, a single large table is provided that cannot fit into decoder fast-memory. In some embodiments, individual elements can be optimized for storage in fast-memory by selecting more frequently occurring entries or groups of entries into decoder memory.

摘要翻译： 描述了可变长度解码系统中优化系统性能的系统和方法。 对实施例进行说明，其中解析表被分析，并且按照发生概率对表中的元素进行排序。 可以通过发生概率来确定元素的存储，并且本发明的实施例可以通过将最可能的条目存储在最慢的存储器中的快速存储器和最不可能的条目中来优化系统效率。 在某些实施例中，提供了不能适应解码器快速存储器的单个大表。 在一些实施例中，通过选择更频繁出现的条目或条目组到解码器存储器中，各个元件可以被优化用于存储在快速存储器中。

公开(公告)号：US07372378B2

公开(公告)日：2008-05-13

申请号：US11293708

申请日：2005-12-01

申请人： Partha Sriram

发明人： Partha Sriram

IPC分类号： H03M7/40

CPC分类号： H03M7/425

摘要： Methods and systems that leverage the advantages of Huffman coding to increase processing efficiency of a data-stream while simultaneously minimizing storage requirements are provided. Decoding efficiency and table storage requirements can be balanced to produce systems that can be adapted for use in high-end network infrastructure applications and for low-resourced portable consumer devices. The systems and methods are operative in decoding data streams using multi-symbol codes and sign information, including AAC and MP3 data streams. A hierarchical structure of tables is described as having primary tables, secondary tables, tertiary tables and so on. Optimization balances processing requirements, table storage requirements and the described systems and methods may be implemented on a variety of processing platforms.

摘要翻译： 利用霍夫曼编码优势提高数据流处理效率同时最大限度地减少存储需求的方法和系统。 可以平衡解码效率和表存储要求，以产生可适用于高端网络基础设施应用和低资源便携式消费设备的系统。 这些系统和方法在使用包括AAC和MP3数据流的多符号代码和符号信息来解码数据流的情况下是有效的。 表的分层结构被描述为具有主表，辅表，大表等。 优化平衡处理要求，表存储要求以及描述的系统和方法可以在各种处理平台上实现。

公开(公告)号：US20100104008A1

公开(公告)日：2010-04-29

申请号：US12650362

申请日：2009-12-30

申请人： Ravi Bulusu ,  Partha Sriram

发明人： Ravi Bulusu ,  Partha Sriram

IPC分类号： H04N11/02

CPC分类号： G06F17/147 ,  G06F17/145

摘要： A method and system for performing a 2D transform is disclosed. The 2D transform may include a row transform and/or a column transform. When performing the row or column transform, it may be determined whether each of different subsets of the data values including a partition of a row or column includes at least one zero value, whether each of different subsets of a first subset of the partition includes at least one zero value, and whether each of different subsets of at least one other subset of the partition includes at least one zero value. When performing the row or column transform, at least one transformation operation on at least one zero value may be bypassed or performed in a reduced-power manner, where such transformation operation would otherwise be performed in a manner consuming full power if the zero value were a non-zero value.

摘要翻译： 公开了一种用于执行2D变换的方法和系统。 2D变换可以包括行变换和/或列变换。 当执行行或列变换时，可以确定包括行或列的分区的数据值的不同子集中的每一个是否包括至少一个零值，分区的第一子集中的每个不同子集是否包含在 至少一个零值，以及分区的至少一个其他子集的不同子集中的每一个是否包括至少一个零值。 当执行行或列变换时，可以以减少功率的方式绕过或执行至少一个零值的至少一个变换操作，否则将以消耗全部功率的方式执行这种变换操作，如果零值为 非零值。

公开(公告)号：US08666166B2

公开(公告)日：2014-03-04

申请号：US12650362

申请日：2009-12-30

申请人： Ravi Bulusu ,  Partha Sriram

发明人： Ravi Bulusu ,  Partha Sriram

IPC分类号： G06K9/36

CPC分类号： G06F17/147 ,  G06F17/145

摘要： A method and system for performing a 2D transform is disclosed. The 2D transform may include a row transform and/or a column transform. When performing the row or column transform, it may be determined whether each of different subsets of the data values including a partition of a row or column includes at least one zero value, whether each of different subsets of a first subset of the partition includes at least one zero value, and whether each of different subsets of at least one other subset of the partition includes at least one zero value. When performing the row or column transform, at least one transformation operation on at least one zero value may be bypassed or performed in a reduced-power manner, where such transformation operation would otherwise be performed in a manner consuming full power if the zero value were a non-zero value.

摘要翻译： 公开了一种用于执行2D变换的方法和系统。 2D变换可以包括行变换和/或列变换。 当执行行或列变换时，可以确定包括行或列的分区的数据值的不同子集中的每一个是否包括至少一个零值，分区的第一子集中的每个不同子集是否包含在 至少一个零值，以及分区的至少一个其他子集的不同子集中的每一个是否包括至少一个零值。 当执行行或列变换时，可以以减少功率的方式绕过或执行至少一个零值的至少一个变换操作，否则将以消耗全部功率的方式执行这种变换操作，如果零值为 非零值。

公开(公告)号：US20070078661A1

公开(公告)日：2007-04-05

申请号：US11599106

申请日：2006-11-14

申请人： Partha Sriram ,  Robert Quan ,  Bhagawan Gnanapa ,  Ahmet Karakas

发明人： Partha Sriram ,  Robert Quan ,  Bhagawan Gnanapa ,  Ahmet Karakas

IPC分类号： G10L21/00

CPC分类号： G06F17/147 ,  G10L19/0212 ,  G10L25/27

摘要： In some embodiments, a data processing system including an operation unit including circuitry configurable to perform any selected one of a number of operations on data (e.g., audio data) and a configuration unit configured to assert configuration information to configure the operation unit to perform the selected operation. When the operation includes matrix multiplication of a data vector and a matrix whose coefficients exhibit symmetry, the configuration information preferably includes bits that determine signs of all but magnitudes of only a subset of the coefficients. When the operation includes successive addition and subtraction operations on operand pairs, the configuration information preferably includes bits that configure the operation unit to operate in an alternating addition/subtraction mode to perform successive addition and subtraction operations on each pair of data values of a sequence of data value pairs. In some embodiments, the configuration information includes bits that configure the operation unit to operate in a non-consecutive (e.g., butterfly or bit-reversed) addressing mode to access memory locations having consecutive addresses in a predetermined non-consecutive sequence. Other aspects are audio encoders and decoders including any embodiment of, and configuration units and operation units for use in, any embodiment of the system, and methods performed during operation of any embodiment of the system or configuration or operation unit thereof.

摘要翻译： 在一些实施例中，一种数据处理系统，包括操作单元，该操作单元包括可配置为执行对数据的多个操作（例如，音频数据）中的任何一个操作的配置单元，以及配置单元，用于断言配置信息，以配置操作单元执行 选择操作。 当操作包括数据向量的矩阵乘法和其系数表现出对称性的矩阵时，配置信息优选地包括仅确定系数的子集的除了大小的符号的位。 当操作包括对操作数对的连续加减运算时，配置信息优选地包括配置操作单元以交替加/减模式操作的位，以对序列的每一对数据值执行连续的加法和减法运算 数据值对。 在一些实施例中，配置信息包括配置操作单元以非连续（例如，蝶形或位反转）寻址模式操作以访问具有预定非连续序列中的连续地址的存储单元的位。 其他方面是音频编码器和解码器，包括用于系统的任何实施例的任何实施例，配置单元和操作单元，以及在系统或其配置或操作单元的任何实施例的操作期间执行的方法。

公开(公告)号：US08990280B2

公开(公告)日：2015-03-24

申请号：US11599106

申请日：2006-11-14

申请人： Partha Sriram ,  Robert Quan ,  Bhagawan Reddy Gnanapa ,  Ahmet Karakas

发明人： Partha Sriram ,  Robert Quan ,  Bhagawan Reddy Gnanapa ,  Ahmet Karakas

IPC分类号： G06F17/14 ,  G06F7/52 ,  G10L19/02 ,  G10L25/27

CPC分类号： G06F17/147 ,  G10L19/0212 ,  G10L25/27

摘要： In some embodiments, a data processing system including an operation unit including circuitry configurable to perform any selected one of a number of operations on data (e.g., audio data) and a configuration unit configured to assert configuration information to configure the operation unit to perform the selected operation. When the operation includes matrix multiplication of a data vector and a matrix whose coefficients exhibit symmetry, the configuration information preferably includes bits that determine signs of all but magnitudes of only a subset of the coefficients. When the operation includes successive addition and subtraction operations on operand pairs, the configuration information preferably includes bits that configure the operation unit to operate in an alternating addition/subtraction mode to perform successive addition and subtraction operations on each pair of data values of a sequence of data value pairs.

摘要翻译： 在一些实施例中，一种数据处理系统，包括操作单元，该操作单元包括可配置为执行对数据的多个操作（例如，音频数据）中的任何一个操作的配置单元，以及配置单元，用于断言配置信息，以配置操作单元执行 选择操作。 当操作包括数据向量的矩阵乘法和其系数表现出对称性的矩阵时，配置信息优选地包括仅确定系数的子集的除了大小的符号的位。 当操作包括对操作数对的连续加减运算时，配置信息优选地包括配置操作单元以交替加/减模式操作的位，以对序列的每一对数据值执行连续的加法和减法运算 数据值对。

公开(公告)号：US20080050036A1

公开(公告)日：2008-02-28

申请号：US11510218

申请日：2006-08-25

申请人： Ravi Bulusu ,  Partha Sriram

发明人： Ravi Bulusu ,  Partha Sriram

IPC分类号： G06K9/36 ,  G06K9/40 ,  G06K9/46

CPC分类号： G06F17/147 ,  G06F17/145

摘要： In some embodiments, a method for performing and a system configured to perform a 2D transform (for example, an inverse discrete cosine transform) on each block of a sequence of data blocks, where the 2D transform includes a row transform and a column transform. To perform the row or column transform on a row or column of data, these embodiments determine whether each of different subsets of the data values comprising a partition of the row (column) includes at least one zero value, whether each of different subsets of a first subset of the partition includes at least one zero value, and whether each of different subsets of at least one other subset of the partition includes at least one zero value. When performing the row (column) transform on each row or column that includes at least one zero value and at least one non-zero value, at least one transformation operation on at least one zero value is bypassed or performed in a reduced-power manner, where such transformation operation would otherwise be performed in a manner consuming full power if the zero value were a non-zero value. In some embodiments, the system is a pipelined video decoding system or other video processing system (or a video processing subsystem of a portable media player or other system) including a transform engine implemented in accordance with the invention. Other aspects are transform engines and transform engine circuitry for use in any embodiment of the system.

摘要翻译： 在一些实施例中，一种用于执行的方法和被配置为对数据块序列的每个块执行2D变换（例如，逆离散余弦变换）的系统，其中2D变换包括行变换和列变换。 为了在数据行或列上执行行或列变换，这些实施例确定包括行（列）的分区的数据值的不同子集中的每个是否包括至少一个零值，每个不同的子集是否为 分区的第一子集包括至少一个零值，以及分区中至少一个其他子集的不同子集中的每一个是否包括至少一个零值。 当在包括至少一个零值和至少一个非零值的每个行或列上执行行（列）变换时，至少一个零值的至少一个变换操作以减少功率的方式被旁路或执行 其中如果零值是非零值，则以这种方式消耗全部功率的方式执行这种转换操作。 在一些实施例中，系统是包括根据本发明实现的变换引擎的流水线视频解码系统或其他视频处理系统（或便携式媒体播放器或其他系统的视频处理子系统）。 其他方面是用于系统的任何实施例的变换引擎和变换引擎电路。