公开(公告)号：US06532565B1

公开(公告)日：2003-03-11

申请号：US09440323

申请日：1999-11-15

申请人： Ron M. Roth ,  Gadiel Seroussi ,  Ian F. Blake

发明人： Ron M. Roth ,  Gadiel Seroussi ,  Ian F. Blake

IPC分类号： H03M1300

CPC分类号： G11C7/02 ,  G11C7/1006 ,  H03M13/15 ,  H03M13/17

摘要： A system for memory word error correction that enables correction of burst errors in memory words. The system is based on an adaptation of two-error correction BCH code which yields burst error correction without increasing the number of error correction bits in the memory words over prior two-error BCH code error correction schemes. The adaptation of two-error correction BCH code when combined with additional techniques for detecting columns of burst errors enables the correction of burst errors and additional random bit errors in memory words.

摘要翻译： 一种用于存储器字错误校正的系统，其能够校正存储器字中的突发错误。 该系统基于双纠错BCH码的适应，其产生突发错误校正，而不增加存储器字中的纠错位数超过先前的两误差BCH码纠错方案。 当与用于检测突发错误列的附加技术组合时，双纠错BCH码的适应使得能够校正存储器字中的突发错误和附加的随机位错误。

公开(公告)号：US06466959B2

公开(公告)日：2002-10-15

申请号：US09751438

申请日：2001-02-26

申请人： Ian F. Blake ,  Ron M. Roth ,  Gadiel Seroussi

发明人： Ian F. Blake ,  Ron M. Roth ,  Gadiel Seroussi

IPC分类号： G06F700

CPC分类号： G06F7/724 ,  G06F7/726

摘要： A method and apparatus are shown for performing efficient arithmetic on binary vectors in a finite field. Typically, there is an efficient algorithm within an execution context, such as hardware or software, for performing a selected arithmetic operation on an operand. When the operand is in a first representative format and the efficient algorithm operates in an alternative representation format, then the operand is permutated from the first representative format to the alternative representation format. The efficient algorithm is then performed on the operand in the alternative representation format in order to obtain a result in the alternative representation format. The result is then permutated from the alternative representation format to the first representation format. Thus, efficient arithmetic is obtained by using the most efficient algorithm available in either the first representation format or the alternative representation format and permuting operands and results to the representation format corresponding to the most efficient algorithm available.

摘要翻译： 示出了在有限域中对二进制向量执行有效运算的方法和装置。 通常，在执行上下文（例如硬件或软件）中存在用于对操作数执行所选算术运算的有效算法。 当操作数处于第一代表格式并且有效算法以替代表示格式操作时，则操作数从第一代表格式转换为替代表示格式。 然后以替代表示格式对操作数执行有效的算法，以获得替代表示格式的结果。 然后将结果从替代表示格式转换为第一表示格式。 因此，通过使用以第一表示格式或替代表示格式可用的最有效的算法并且将操作数和结果替换为与可用的最有效算法相对应的表示格式而获得有效的算术。

公开(公告)号：US06199087B1

公开(公告)日：2001-03-06

申请号：US09104894

申请日：1998-06-25

申请人： Ian F. Blake ,  Ron M. Roth ,  Gadiel Seroussi

发明人： Ian F. Blake ,  Ron M. Roth ,  Gadiel Seroussi

IPC分类号： G06F738

CPC分类号： G06F7/724 ,  G06F7/726

摘要： A method and apparatus are shown for performing efficient arithmetic on binary vectors in a finite field. Typically, there is an efficient algorithm within an execution context, such as hardware or software, for performing a selected arithmetic operation on an operand. When the operand is in a first representative format and the efficient algorithm operates in an alternative representation format, then the operand is permutated from the first representative format to the alternative representation format. The efficient algorithm is then performed on the operand in the alternative representation format in order to obtain a result in the alternative representation format. The result is then permutated from the alternative representation format to the first representation format. Thus, efficient arithmetic is obtained by using the most efficient algorithm available in either the first representation format or the alternative representation format and permuting operands and results to the representation format corresponding to the most efficient algorithm available.

公开(公告)号：US06178436B1

公开(公告)日：2001-01-23

申请号：US09108998

申请日：1998-07-01

申请人： Ian F. Blake ,  Gadiel Seroussi

发明人： Ian F. Blake ,  Gadiel Seroussi

IPC分类号： G06F700

CPC分类号： G06F7/724 ,  G06F5/01

摘要： An apparatus and method are shown for multiplying vectors of length n in a finite field. A first vector is circularly shifted in a first shift register under control of a shift signal. A second vector is circularly shifted in a second shift register also under control of the shift signal. An accumulated result vector is circularly shifted in a third shift register under control of the shift signal. Elements of the second vector are logically combined according to a tensor of the multiplication operation to obtain an intermediate result which is combined with the elements of the accumulated result vector to obtain a combination result vector. However, the combination result vector is only loaded into the third shift register when a logic ‘1’ value is present in a first position of the first shift register. Therefore, the first, second and third shift registers can be circularly shifted until a logic ‘1’ is encountered in the first vector, at which time the combination result vector is loaded into the third shift register. Since a vector will, on average, contain n/2 elements that are logic ‘1’, the number of operations for a multiplication can be reduced, on average, to n/2.

摘要翻译： 示出了用于在有限域中乘以长度为n的矢量的装置和方法。 在移位信号的控制下，第一矢量在第一移位寄存器中循环移位。 在移位信号的控制下，第二矢量也在第二移位寄存器中循环移位。 在移位信号的控制下，累积结果矢量在第三移位寄存器中循环移位。 根据乘法运算的张量逻辑地组合第二向量的元素，以获得与累积结果向量的元素组合的中间结果，以获得组合结果向量。 然而，当在第一移位寄存器的第一位置存在逻辑“1”值时，组合结果向量仅被加载到第三移位寄存器中，因此，第一，第二和第三移位寄存器可以循环移位直到逻辑 在第一向量中遇到“1”，此时将组合结果向量加载到第三移位寄存器中。 由于向量将平均包含n / 2个逻辑“1”的元素，所以乘法运算的数量平均可以减少到n / 2。