DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20250169303A1

    公开(公告)日:2025-05-22

    申请号:US18907729

    申请日:2024-10-07

    Abstract: A display apparatus may include a first inorganic insulating layer disposed between a first semiconductor layer and a first gate electrode, a second inorganic insulating layer disposed between the first gate electrode and a capacitor electrode, a third inorganic insulating layer disposed on the capacitor electrode, a fourth inorganic insulating layer disposed between a second semiconductor layer and a second gate electrode, a fifth inorganic insulating layer disposed on the second gate electrode, a 1st-1 connection electrode disposed over the fifth inorganic insulating layer and electrically connected to the first semiconductor layer through a 1st-1 contact hole passing through the first to the fifth inorganic insulating layer, and a 1st-1 bridge contact layer covering a portion of the fifth inorganic insulating layer, an inner surface of the 1st-1 contact hole, and a portion of the first semiconductor layer corresponding to the 1st-1 contact hole.

    DISPLAY DEVICE
    3.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20230309343A1

    公开(公告)日:2023-09-28

    申请号:US18089457

    申请日:2022-12-27

    CPC classification number: H10K59/1213 H10K59/1216

    Abstract: A display device includes a substrate, an active pattern disposed on the substrate, and including a first area, a second area, a (1-1)th channel area, a (1-2)th channel area, and a third area disposed between the (1-1)th channel area and the (1-2)th channel area, a first insulating layer disposed on the substrate and covering the active pattern, a second insulating layer which is disposed on the first insulating layer and in which an opening overlapping the (1-2)th channel area, the second area, and the third area is defined, a first gate electrode disposed on the first insulating layer and overlapping the (1-1)th channel area the (1-2)th channel area, respectively, and a high dielectric layer disposed on the first insulating layer and the second insulating layer, covering the first gate electrode, and filling the opening.

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