公开(公告)号：US20250024691A1

公开(公告)日：2025-01-16

申请号：US18417937

申请日：2024-01-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngsun SONG ,  Seulji Song ,  Bon Jae Koo

IPC: H10B99/00

Abstract: A three-dimensional memory device includes a base dielectric layer disposed on a substrate, a stack structure that includes word lines and interlayer dielectric layers that are alternately stacked on the base dielectric layer, a bit line that penetrates the stack structure and extends in a vertical direction perpendicular to a top surface of the substrate, and buried storage patterns interposed between the bit line and the word lines and spaced apart from each other in the vertical direction. Each of the buried storage patterns has a width in a horizontal direction parallel to the top surface of the substrate. The widths of the buried storage patterns increase with increasing vertical distance from the substrate.

公开(公告)号：US20240422996A1

公开(公告)日：2024-12-19

申请号：US18413281

申请日：2024-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bon Jae Koo ,  Seul Ji Song ,  Hwa Yeong Lee

IPC: H10B99/00

Abstract: A nonvolatile memory device may include a substrate, a plurality of gate electrodes stacked on the substrate, a first conductive pillar that extends in a first direction and intersects the gate electrodes, a second conductive pillar that extends in the first direction and intersects the gate electrodes, the second conductive pillar being spaced apart from the first conductive pillar, an information storage film between the first conductive pillar and each of the gate electrodes and between the second conductive pillar and each of the gate electrodes, the information storage film including chalcogenide, a conductive layer spaced apart from the gate electrodes in the first direction, a first charge dissipation layer between the first conductive pillar and the conductive layer, and a second charge dissipation layer between the second conductive pillar and the conductive layer, the second charge dissipation layer being spaced apart from the first charge dissipation layer.