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公开(公告)号:US20200335468A1
公开(公告)日:2020-10-22
申请号:US16713143
申请日:2019-12-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Gyu Jin Choi , Sung Hoan Kim , Chang Eun Joo , Chil Woo Kwon , Young Kyu Lim , Sung Uk Lee
IPC: H01L23/00 , H01L23/498 , H01L23/13 , H01L23/31
Abstract: A semiconductor package includes: a semiconductor chip including a body having a first surface and a second surface, opposing the first surface, a connection pad disposed on the first surface of the body, and an extension pad disposed on the connection pad; and a connection structure including an insulating layer disposed on the first surface of the body of the semiconductor chip, a redistribution via penetrating through the insulating layer and having one side thereof in contact with the extension pad, and a redistribution layer disposed on the insulating layer and having a via pad in contact with the other side of the redistribution via, wherein a horizontal cross-sectional area of extension pad of the semiconductor chip is greater than a horizontal cross-sectional area of the connection pad of the semiconductor chip.
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公开(公告)号:US11244921B2
公开(公告)日:2022-02-08
申请号:US16723588
申请日:2019-12-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Chang Eun Joo , Sung Hoan Kim , Kyung Moon Jung , Yong Hwan Kwon , Young Kyu Lim , Seong Hwan Park
IPC: H01L23/00 , H01L23/498 , H01L23/13 , H01L23/31
Abstract: A semiconductor package is provided. The semiconductor package includes a connection structure, a semiconductor chip, and a connection metal. The connection structure includes a redistribution layer and a connection via layer. The semiconductor chip is disposed on the connection structure, and includes a connection pad. The connection metal is disposed on the connection structure and is electrically connected to the connection pad by the connection structure. The connection via layer includes a connection via having a major axis and a minor axis, and in a plan view, the minor axis of the connection via intersects with the connection metal.
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公开(公告)号:US11171107B2
公开(公告)日:2021-11-09
申请号:US16713143
申请日:2019-12-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Gyu Jin Choi , Sung Hoan Kim , Chang Eun Joo , Chil Woo Kwon , Young Kyu Lim , Sung Uk Lee
Abstract: A semiconductor package includes: a semiconductor chip including a body having a first surface and a second surface, opposing the first surface, a connection pad disposed on the first surface of the body, and an extension pad disposed on the connection pad; and a connection structure including an insulating layer disposed on the first surface of the body of the semiconductor chip, a redistribution via penetrating through the insulating layer and having one side thereof in contact with the extension pad, and a redistribution layer disposed on the insulating layer and having a via pad in contact with the other side of the redistribution via, wherein a horizontal cross-sectional area of extension pad of the semiconductor chip is greater than a horizontal cross-sectional area of the connection pad of the semiconductor chip.
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