公开(公告)号：US20200326865A1

公开(公告)日：2020-10-15

申请号：US16914724

申请日：2020-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wang-Soo KIM ,  Jung-Hwan CHOI ,  Ki-Duk PARK ,  Yoo-Chang SUNG ,  Jin-Sung YOUN ,  Chang-Kyo LEE ,  Ju-Ho JEON ,  Jin-Seok HEO

IPC: G06F3/06 ,  H04L25/03 ,  G11C29/02 ,  G11C5/04 ,  G11C29/12

Abstract: A memory module includes a plurality of semiconductor memory devices associated with a same module board. The plurality of semiconductor memory devices configured to simultaneously perform a training operation, the plurality of semiconductor memory devices including a reception interface circuit configured to perform the training operation to search for selected equalization coefficients of an equalizer based on a training pattern from a memory controller, and transmit a training information signal to the memory controller in a training mode in response to a training command from the memory controller, the training information signal including the selected equalization coefficients.

公开(公告)号：US20220310151A1

公开(公告)日：2022-09-29

申请号：US17807163

申请日：2022-06-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dae-Sik MOON ,  Gil-Hoon CHA ,  Ki-Seonk OH ,  Chang-Kyo LEE ,  Yeon-Kyu CHOI ,  Jung-Hwan CHOI ,  Kyung-Soo HA ,  Seok-Hun HYUN

IPC: G11C11/4076 ,  G11C11/409 ,  G06F3/06 ,  G11C7/22

Abstract: A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.